| US 7,375,764 B2 | ||
| Method and system for VFC memory management | ||
| Michael Dwayne Knox, Fishers, Ind. (US); and Guenter Anton Grimm, Deiblingen (Germany) | ||
| Assigned to Thomson Licensing, Boulogne, Billancourt (France) | ||
| Appl. No. 10/514,663 PCT Filed May 12, 2003, PCT No. PCT/US03/14766 § 371(c)(1), (2), (4) Date Nov. 16, 2004, PCT Pub. No. WO03/100551, PCT Pub. Date Dec. 04, 2003. |
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| Claims priority of provisional application 60/381414, filed on May 17, 2002. | ||
| Prior Publication US 2005/0225673 A1, Oct. 13, 2005 | ||
| Int. Cl. H04N 7/01 (2006.01); H04N 11/20 (2006.01); H04N 9/64 (2006.01) | ||
| U.S. Cl. 348—458 [348/441; 348/443; 348/445; 348/459; 348/714; 348/716] | 15 Claims |
| 9. A digital video receiving system, comprising:
an antenna;
an input processor coupled to the antenna;
a demodulator coupled to the input processor; and
a video processor coupled to the demodulator, the video processor including vertical format converter (“VFC”) line memories
and being configured to
write a number of first input video lines into the VFC line memories,
write an additional video line into the VFC line memories, and
begin reading respective pixels of the first input video lines and the additional input video line from the VFC line memories
in parallel prior to a completion of the writing of the additional video line.
|