Hit Buffer VME Addresses

function hex address (bytes) access req(*) bits
  start(+) range     7 6 5 4 3 2 1 0
Error Register Status YY000X00 4 R   IDR IDH IO LS RPE HPE RFO HFO
Clear Error Register YY000X00 4 W                  
Init YY000X04 4 W                  
Test Mode Status YY000X08 4 R                 TM
Set Test Mode YY000X08 4 W                  
Hit FIFO Status YY000X0C 4 R             FF_ HF_ EF_
Road FIFO Status YY000X10 4 R             FF_ HF_ EF_
Output Hold Status YY000X14 4 R                 HD_
FSM Status YY000X18 4 R           CLR TRL RDY Q0
Hit FifoCtr FSM Status YY000X20 4 R               Q1 PK_
Road FifoCtr FSM Status YY000X24 4 R               Q1 PK_
Output Register YY000X28 4 R/W TM 22..0 sent to output
Freeze VME YY000X2C 4 R/W TM               FZV
Hit Spy Pointer Status YY000X30 4 R   18=Freeze_ 17=Overflow 16..0=Pointer
Clear Hit Spy Pointer YY000X30 4 W                  
Road Spy Pointer Status YY000X34 4 R   18=Freeze_ 17=Overflow 16..0=Pointer
Clear Road Spy Pointer YY000X34 4 W                  
Output Spy Pointer Status YY000X38 4 R   18=Freeze_ 17=Overflow 16..0=Pointer
Clear Output Spy Pointer YY000X38 4 W                  
Error Line Enable YY000X40 4 R/W   IDR IDH IO LS RPE HPE RFO HFO
CDF_Error Enable YY000X44 4 R/W                 ENA
CDF_Error status YY000X48 4 R                 ERR
DIP Switches Status YY000X4C 4 R           HE L2 L1 L0
ID PROM YY100000 40000 R   31..24=ASCII char 23..0=undef
HIT FIFO YY200000 10000 R TM 31=EF_ 22..0=fifo bits
ROAD FIFO YY210000 10000 R TM 31=EF_ 22..0=fifo bits
Hit Spy Buffer YY280000 80000 R FZ/TM 22..0 valid bits from Spy Buffer
Road Spy Buffer YY300000 80000 R FZ/TM 22..0 valid bits from Spy Buffer
Output Spy Buffer YY380000 80000 R FZ/TM 22..0 valid bits from Spy Buffer
SS Map YY400000 80000 R/W TM                
AM Map YY800000 400000 R/W TM                
(*) TM=only possible in Test Mode, FZ=only possible if FREEZE is asserted, FZ/TM=both(o)
(o) Reading Spy Buffers in TM requires FZ or Freeze VME (FZV) being set
(+) YY=[GA4,GA3,GA2,GA1,GA0,0,0,0], X=dont' care

Last Updated 20 Apr 99. By Stefano Belforte
Email: Stefano.Belforte@ts.infn.it