FFO Firmware

The FIB Fanout uses Lattice Semiconductor ispLSI 1032 and ispLSI 2032 In-System programmable high density PLDs. The software used to design and produce the programmable logic files is the Lattice Semiconductor ISP Synario Software Kit V5.0 and the ispGDX V1.5.1. There is a download configuration file (.dld) and a JEDEC (.JED) file produced for each of the 10 programmable chips. The Lattice Semiconductor ISP Daisy Chain Download (ispDCD) software tool is used to download the programmable devices singly or in a daisy chain. The programming hardware required is an IBM PC (486 or greater), and a PC parallel port to Fanout front panel ISP connector cable.