US 7,379,509 B2
Digital intermediate frequency QAM modulator using parallel processing
Hsueh-Yuan Pao, Livermore, Calif. (US); and Binh-Nien Tran, San Ramon, Calif. (US)
Assigned to Lawrence Livermore National Security, LLC, Livermore, Calif. (US)
Filed on Aug. 19, 2003, as Appl. No. 10/644,561.
Claims priority of provisional application 60/404596, filed on Aug. 19, 2002.
Prior Publication US 2004/0136471 A1, Jul. 15, 2004
Int. Cl. H04L 27/36 (2006.01)
U.S. Cl. 375—298  [375/261; 332/103] 12 Claims
OG exemplary drawing
 
1. A digital intermediate frequency Quadrature Amplitude Modulation modulator using parallel processing without the use of a multiplier, comprising:
a serial-to-parallel data converter operatively connected to receive serial data, wherein said serial-to-parallel data converter converts a string of serial data to a plurality of parallel data;
an I and Q mapper operatively connected to receive said plurality of parallel data and determine its I and Q locations;
a plurality of look-up-tables (LUTs) operatively connected to receive and store said I and Q locations, wherein the I LUTs are configured I1 to IN, wherein N is the highest number of I LUTs of said plurality of LUTs, wherein the Q LUTs are configured Q1 to QX, wherein X is the highest number of Q LUTs of said plurality of LUTs;
a plurality of adders operatively connected to receive and add said I and Q locations stored within said plurality of LUTs, wherein said plurality of adders are configured A1 to AIQN, wherein IQN is the highest number of adders of said plurality of adders, wherein each I and Q having a particular subscript are added in the adder having the same subscript to produce output data comprising IQ1 to IQIQN;
a plurality of registers operatively connected to collect and store said output data comprising IQ1 to IQIQN; and
a digital to analog converter operatively connected to convert said output data comprising IQ1 to IQIQN to analog data, wherein said Quadrature Amplitude Modulation modulator does not include a multiplier.