00/07/27;17:13;baroiant;http://ncdf17.fnal.gov/cgi-bin/lgbk?user=baroiant&ent=9229 Tested as part of P10405 EOE 00/05/03;11:33;joelg; Pinhole created on 2nd silicon during testing. Clear evidence of physical damage, although impossible to tell when scratch occurred. I blame David. EOE 99/10/29;12:02;chill;http://ncdf17.fnal.gov/cgi-bin/lgbk?user=chill&ent=1365 XTL tests of P05 after pinhole removal EOE 99/10/29;11:22;joelg; Last n side candidate pulled. Both sides run OK at 100V individually, ladder fine at /-70V. EOE 99/10/29;11:21;joelg; p side OK at 100V. n side pinhole seems to disappear if ladder is left unconnected for a while and reappears at 75-80V. Able to find by fully depleting ladder from p side. EOE 99/10/29;11:19;joelg; n side raised to 80V and p to 50V. New pinhole on both. Can't determine n side candidate without depleting, so pull p side. EOE 99/10/28;17:12;joelg; On raising voltage to 40V on n side, the same pinhole reappeared and was pulled at fanout. Currents now symmetric and small at /-50V. EOE 99/10/28;16:11;joelg; Pinhole pulled at 1st-2nd silicon. Current now symmetric and 13uA at /-25V, although visible defect on 1st silicon. EOE 99/10/28;15:55;joelg; New pinhole observed on n side, without voltages being raised over 20V since the creation of the last one. EOE 99/10/28;15:54;joelg; Visible defect on 3rd silicon at location of new pinhole, so 2nd-3rd bond only pulled. z-side pinhole and one neighbour pulled also. EOE 99/10/28;10:47;joelg; While looking at effect of pinhole on other side, raised voltage to 30V and blew pinhole on n side. EOE 99/10/28;10:46;joelg; Pulled 1st silicon candidate at fanout, and two candidates neighbouring previous candidates at 1st-2nd silicon. /-25V gives 8/-58uA. One pulled z side still a candidate - will pull at fanout. EOE 99/10/28;10:43;joelg; n side candidate was pulled at fanout. Three z side candidates pulled between 1st and 2nd silicon. 15/-25V now gives 11/-90uA so n side is OK and probably got at least one p side. From XTL, one candidate p side still there so it must be on the first silicon. Other two look OK but each now have a neighbouring strip that looks like a pinhole. EOE 99/10/27;18:32;joelg; Currents about 100uA at /-15V or so. One n side and three z side pinhole candidates identified. EOE 99/10/27;17:39;joelg; Assembly and bonding finished. In addition to all of phi side, all channels on chip 6 and chip 7 0-107 were bonded using K S 1478. All other p side channels were done with Hughes 2470. Error means all of chip 4 and chip 5 0-63 were bonded 5 bonds too the right (i.e. chip 5 0-4 are not connected, chip 5 5 goes to D256 etc.) EOE 99/10/20;08:11;joelg Ladder entered in database. EOE