| Title |
DETNI readout system prototype |
Submitted |
26-JAN-07 07:58 (UTC -06:00) |
| Classification |
Trigger and Data Acquisition |
Modified |
22-MAR-07 17:21 (UTC -05:00) |
| Session |
PS2A |
Presentation |
Poster |
| Presenter |
Andrea Borga |
Paper ID |
PS2A009 |
| Author(s) |
Andrea Borga, Guenter Kemmerling, Christof Thielmann (Forschungszentrum Juelich, Juelich), Burckhard Gebauer (HMI, Berlin) |
| Abstract |
Within the DETNI project, a new self-triggered ASIC has been developed. It is to detect signals coming from three different detector types with a time resolution of 2 ns, whereas time and analog information are stored in on-chip FIFOs. The final readout system has to cope with up to 80 ASICs and high data-rates. Furthermore each ASIC has to be provided with two biphase 256 MHz clock signals. A concept for such a readout system is currently tested by a small scale prototype. It consists of a high precision timing board and a ADC/FPGA board for readout of analog and digital information. |
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Word Count: 102 Character Count: 583 |
| Footnote |
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| Funding Agency |
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