Pending DOM Changes

Draft

Favored changes.

Component Changes

1. Changes to filter circuit between DC-DC converter and communications front end that allow metalized polypropylene film capacitors to replace aluminum electrolytic capacitors.Rev3
   
2. Resistor footprint in parallel with DOM  On-Board LED.  This will provide control of the light pulse trailing edge.Rev3
3. Remove R78 on Sheet 6.  It duplicates R377 on Sheet 7.Rev3
4. Communications transformer, T5, will be replaced with a suitably reliable product with the proper turns ratio will replace the ill-suited TT1.5-6 transformer from Mini-Circuits. (Candidates)  (dual footprint until parts available?)Rev3
5. 1:2 impedance ratio transformers will replace T2 and T3 on the Local Coincidance board. (Candidates) (dual footprint until parts available?) Rev4?
6. 1:1 ratio transformer will replace T8 on Sheet 10.  In Rev 1 and 2, the transformer was not physically robust.  It will be replaced by a suitably reliable transformer. (Candidates) (dual footprint until parts available?)
7. Ferrite Beads B23 and B27, at the input to the DC-DC converter, on the Power Supply sheet,  become Delevan SMB2.5-1 Surface Mount Shield Bead..Rev3
8. L7 and L8 on sheet 14, the oscillator page.  Delevan looks most promising. (Candidates)Rev3
9. Change 220 uH inductors L5, L11, L13, L15 from JW Miller part to one from an approved vendor. (Candidates) . (change on hold 6/20/03)Rev4
10. Change 10 uH inductors L1, L6, L9 from JW Miller part to one from an approved vendor. (Candidates) . (change on hold 6/20/03)Rev4
11. U127 should instead be a JP ref. designation, since it is a connector for an off-board cable.
12. Additional power and ground pins of the EPXA4 must be picked up in this revision.    It includes power for PLLs,  I/O banks, and grounds for PLL and I/O banks.Rev3
13. Move Varistor RV1 from power supply sheet, sheet 4, to a position in parallel with C89 on communications page, sheet 10.  This improves the effectiveness of DOM MB protection from unexpected transients or blunder.Rev3
14. A resistor in series with the grounded end of CR8 should be put in to control saturation current behavior.
15. Two BAS70-04 series diodes should be added from the delay line input to ground to guaranty clipping of PMT signals below 4 Vbe below ground.
16. C481 needs an "*" to indicate that the part is 'do not load' because it is only needed for a higher resolution DAC. (change on hold 6/20/03)
    
17. C470 needs an "*" to indicate that the part is 'do not load' because it is only needed for a higher resolution DAC. (change on hold 6/20/03)
18. R87 on Sheet 10 should be 210 ohms,  and a footprint size greater than 0805 is desirable.   1210 recommended . (change on hold 6/20/03 value TBD)
    
19. R818 on Sheet 10 should be 137 ohms, and a footprint size greater than 0805 is desirable.  1210 recommended.. (change on hold 6/20/03 value TBD)
20. R125 and R137 change value from no-load to 750 ohms in order to properly match the expected impedance of the neighbor-to-neighbor local coincidence cable . (change on hold 6/20/03 value TBD)Rev4
21. R143, R376,  R384, and R387 change from 75.0 ohms to 68.1 ohm. . (change on hold 6/20/03 value TBD)Rev4
22. Put a resistor between CPLD pin 18 and EPXA pin G21 to protect drivers in the case that both pins drive out in opposite directions at the same time. (omission from Rev 2 changes.  Probably not a problem)Rev3
23. Change CPLD from XC2C256_TQ144 to XC2C384_TQ144 logic cell part. for reliability reasonsRev3
24. Create power supply circuit to deliver -3.3V analog supply to support the HFA1135 changesRev3
25. Create power supply circuit to deliver  +6.6V analog supply to support the HFA1135 changesRev3
26. Change U53 from AD8014 to HFA1135 amplifier, along with the usual limiting changes.
27. Install the option of  BAS70-04 diode networks on the inputs of U44 ,U48, U42, U54, U66 to protect the stages from excessively high or pathological transient signals from PMT input
28. Resize resistors at inputs of U41, U44, U48, U54, and U66 to give workable diode clipping behavior.
    
29. Change feedback networks to yield gains of x16, x2, and x0.25 in the ATWD channel 0, channel 1, and channel 2 inputs to properly match up with input diode clipping.Rev3
30. Remove 3.3V power line from analog front end. -Replace with connection to +5VRev3
31. Add COMM_RESET  line between FPGA and CPLD including pull-up.Rev3
32. U53 will be replaced with a clipping amplifier HFA1135.Rev3
33. U50, AD626AR,  Put jumper between pin7 and ground to accommodate control of range (with EPXA4, the output is near the limit of the ADC span)Rev4

Layout Changes

1. Net MEMVIO becomes an island of copper straddling the SD RAM memory chips and the SDRAM Controller section of the CPU chip.Rev3
2. Net MEMCORE becomes an island of copper encompassing both SD RAM Memory Footprints.Rev3
3. Net VddC0 becomes an island of copper covering the various PLL power pins..Rev3
4. The inverting input of all high-speed amplifiers (AD8005, AD8014, HFA1135,  AD830 and AD8130), make sure the components connected to the inverting input are as close as possible to the inverting input.  
   
5. For all high-speed amplifiers (AD8005, AD8014, HFA1135,  AD830 and AD8130)  have inner planes carved away from the inverting input pins and the connected pad of any component connected to the inverting input.  2mm clearance needed around package.Rev3
6. Make sure that the end of the feedback resistor connecting to the non-inverting input is under the non-inverting input pad of any high speed amplifiers.  (Particularly avoid having the either pad of the feedback resistor underneath the non-inverting input.)Rev3
7. Special footprint for JP5, the SMM-105-02-S-D-LC-K,  which has pass-through holes plated through, and connected to SMD pads for the basic connector.
8. Routing of pulser transformer leads away from front end pulser switching signal traces.  series resistors will help.
9. SD_nCLK trace length to match length of other lines going to memory components.
10. Route ATWD input signal traces away from or screen from ATWD digital signal traces.
    
11. Per Albrecht Karle's request, locate DS1 close to the edge of the board.  (as close as possible, with leads parallel to a tangent to the board.
12. If possible, put +6.6V and -3.3V power on planes extending into anlalog front end.
    

Possible changes

1. The ferrite beads, B19 and B30 on U44 pin 4 and pin 7 may be replaced with direct connection to power planes, if bench tests prove the change is justified.  The signal induced noise on the power pins of U44 appears to be insignificant at 1% of the output signal.  .
2. Some improvement to get the 'ringing' out of the pulser. 
   
3. Change from 100V to ±5V DC-DC converter to a 100V to +5V DC-DC converter plus a +5V to -5V switcher on the DOM MB.  (not favored by Bob)