0	#===CHIP A ====	#connect(0) - disconnect(1) to TotalSum Channel 4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2  (Must be set to13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1
0	#===CHIP B ====	#connect(0) - disconnect(1) to TotalSum Channel4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2  (Must be set to13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1
0	#===CHIP C ====	#connect(0) - disconnect(1) to TotalSum Channel4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2   (Must beset to 13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1
0	#===AMUADC T2 ====	#MUX2 output enable(1)/diable(0)
0		#MUX2 output - channel number (0...31)
0		#Correlator off(0)/on(1)
50		#Vref (0...63)
0		#Vcorr (0...63)
52		#Iref (0...63)
0		#MUX2 HIZ enable(1)/disable(0)
0		#MUX1 HIZ enable(1)/disable(0)
0		#MUX1 output enable(1)/diable(0)
0		#MUX1 output - channel number (0...31)
0	#===AMUADC T1 ====	#MUX2 output enable(1)/diable(0)
0		#MUX2 output - channel number (0...31)
0		#Correlator off(0)/on(1)
53		#Vref (0...63)
0		#Vcorr (0...63)
54		#Iref (0...63)
0		#MUX2 HIZ enable(1)/disable(0)
0		#MUX1 HIZ enable(1)/disable(0)
0		#MUX1 output enable(1)/diable(0)
0		#MUX1 output - channel number (0...31)
0	#===AMUADC LG ====	#MUX2 output enable(1)/diable(0)
0		#MUX2 output - channel number (0...31)
0		#Correlator off(0)/on(1)
53		#Vref (0...63)
0		#Vcorr (0...63)
54		#Iref (0...63)
0		#MUX2 HIZ enable(1)/disable(0)
0		#MUX1 HIZ enable(1)/disable(0)
0		#MUX1 output enable(1)/diable(0)
0		#MUX1 output - channel number (0...31)
0	#===AMUADC HG ====	#MUX2 output enable(1)/diable(0)
0		#MUX2 output - channel number (0...31)
0		#Correlator off(0)/on(1)
53		#Vref (0...63)
0		#Vcorr (0...63)
54		#Iref (0...63)
0		#MUX2 HIZ enable(1)/disable(0)
0		#MUX1 HIZ enable(1)/disable(0)
0		#MUX1 output enable(1)/diable(0)
0		#MUX1 output - channel number (0...31)
0	#===CHIP D ====	#connect(0) - disconnect(1) to TotalSum Channel4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2  (Must be set to13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1
0	#===CHIP E ====	#connect(0) - disconnect(1) to TotalSum Channel4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2  (Must be set to13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1
0	#===CHIP F ====	#connect(0) - disconnect(1) to TotalSum Channel4
0		#connect(0) - disconnect(1) to TotalSum Channel 3
0		#connect(0) - disconnect(1) to TotalSum Channel 2
0		#connect(0) - disconnect(1) to TotalSum Channel 1
7		#VGA frequency (0...7)   Channel 4
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 3
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 2
0		#VGA gain (0...31)
7		#VGA frequency (0...7)   Channel 1
0		#VGA gain (0...31)
20		#CFD threshold DAC (0...63)  Channel 1
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 2
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 3
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
20		#CFD threshold DAC (0...63)  Channel 4
0		#CFD mode (0-LED; 1-CFD)
0		#CFD MUX (0-disable; 1-enable)
63		#TotalSum discriminator (0...63). Level 3
63		#TotalSum discriminator (0...63). Level 2
63		#TotalSum discriminator (0...63). Level 1
11		#CFD ZCC (0...15)   DAC 2   (Must beset to 13 - S.Belikov)
12		#CFD ZCC (0...15)   DAC 1  (Must be set to0  - S.Belikov)
30		#Muon 2x2 sum discriminator (0...63).
18		#TAC ramp DAC (0...63)
0		#CAL DAC (0...63).
0		#Calibration enable(1) or disable(0). Channel 4
0		#Calibration enable(1) or disable(0). Channel 3
0		#Calibration enable(1) or disable(0). Channel 2
0		#Calibration enable(1) or disable(0). Channel 1

Modifications to ASIC's serial strings

Given the degree of flexibility provided to user by 256 individually settable parameters for every ASIC board, one is expected to be very much tempted to play with those parameters. While it is not recommended to change them without reasons, there could be times when changing  running conditions is a must. To simplify this work, a user friendly GUI's was writted and is now available for  the general public enjoiement in

/home/phnxemc/FEM/Tools/Java

Content of the GUI is largerly selfexplanatory, you are allowed to load either .srd file or .hex file which already contains preformed serial string and write out new file (hopefully after modifications which make sense) either in the ASCII (.srd) format or in the hexadecimal (.hex) format.

In order to manually modify the FEM serial string data files the following Java utility is of use:
log into phnxemc account on any of VA's;

-> setlocal
->JSerial &

->setenv DISPLAY  whichever machine is host
->java -classpath JSerial.jar JSerial.SerString

The EMCal task manager (emcTM) when running FEMsetup is designed to suggest the user the modifications to preexisting ASIC's serial strings (looks for old one in  $EMCAL_HW_DATABASE/Serials, writes new ones into $EMCAL_HW_DATABASE/SerialsOut). If happy - user can either download newly created strings manually or copy those into official PHENIX download site ($ARCNET_DATA/emc/fem) for general use.