Unpack camac data, hardware trigger bits:

$OFF781_INC/camac_bk.inc
	*  $Log: camac_bk.inc,v $
	* Revision 1.6  1997/03/20  15:59:02  kushnir

$OFF781_SRC/unpack_camac.F
	*  $Log: unpack_camac.F,v $
	c Revision 1.10  1997/07/16  01:20:16  krueger

*
* -- 100% crate, #21
*
   creadout_1 = .true.

   camac_plu_ic  -- PLU C(21)N(12)A(0) decision output
*--
*			Event Scalers:
*
   camac_ev_time -- Event Time [100 kHz]
   camac_trig_nr -- trigger number
   camac_beam_ev -- Beam since last event
   camac_time_ev -- Time since last [53 MHz]
*--
*		T1 level trigger latch
*		======================
T  camac_trig_b0 -- 'A'
T  camac_trig_b1 -- 'B'
T  camac_trig_b2 -- 'C'
*--			H1(3) Latch words
   camac_h1_0    -- H1-
   camac_h1_1    -- H10
   camac_h1_2    -- H1+
*--			H2(4) Latch words
   camac_h2_0    -- H2-
   camac_h2_1    -- H20
   camac_h2_2    -- H2+
   camac_h2_3    -- H2++
*--			100% crate 8-bit ADC
   cam_1_adc_i1  -- IC_1 - Interaction counter 1
   cam_1_adc_i2  -- IC_2 - Interaction counter 2
   cam_1_adc_v5  -- V5   - Interaction counter/Veto Interaction in SVX
   cam_1_adc_s4  -- S4   - Beam Counter/ Interaction in Pb target
*
* --   1% crate, #23
*
   creadout_2 = .true.
*			  1% crate Latch module 1
L  camac_la_11    -- 'A' -- Misc. trigger labels
L  camac_la_12    -- 'B' -- T2 SubTrigger Type and Labels (t2_dec_mlu.c)
L  camac_la_13    -- 'C' -- T1 SubTrigger Type and Labels (t1_dec_plu.c)
*
*--			  1% crate 12-bit ADC
*
   camac_adc_i1   -- IC_1 - Interaction counter 1
   camac_adc_i2   -- IC_2 - Interaction counter 2
   camac_adc_v5   -- V5   - Interaction counter/Veto Interaction in SVX
   camac_adc_lz   -- Level Zero - Base Line for pedestal compensation
   camac_adc_ch04 -- -X- unused
   camac_adc_ch05 -- -X- unused
   camac_adc_ch06 -- -X- unused
   camac_adc_ch07 -- -X- unused
   camac_adc_ch08 -- -X- unused
   camac_adc_ch09 -- -X- unused
   camac_adc_ch10 -- -X- unused
   camac_adc_s4   -- S4 - Beam Counter / Interaction in Pb target
*
*			BTRD Amplitudes
*
   camac_adc_btrd00 -- 
   camac_adc_btrd01 -- 
   camac_adc_btrd02 -- 
   camac_adc_btrd03 -- 
   camac_adc_btrd04 -- 
   camac_adc_btrd04 -- 
   camac_adc_btrd05 -- 
   camac_adc_btrd06 -- 
   camac_adc_btrd07 -- 
   camac_adc_btrd08 -- 
   camac_adc_btrd09 -- 
   camac_adc_btrd10 -- 
   camac_adc_btrd11 -- 
*			  1% crate Latch module 1
L  camac_la_21    -- 'A'
L  camac_la_22    -- 'B'
L  camac_la_23    -- 'C'
*
   camac_rt_rmh   -- Readout time RMH
   camac_rt_fsda  -- Readout time FSDA