| US 7,375,593 B2 | ||
| Circuits and methods of generating and controlling signals on an integrated circuit | ||
| Paul William Ronald Self, 3368 Creighton Pl., Santa Clara, Calif. 95051 (US) | ||
| Filed on Mar. 20, 2006, as Appl. No. 11/384,913. | ||
| Application 11/384913 is a continuation in part of application No. 11/329779, filed on Jan. 11, 2006. | ||
| Application 11/329779 is a continuation in part of application No. 11/200472, filed on Aug. 09, 2005. | ||
| Application 11/200472 is a continuation in part of application No. 11/038560, filed on Jan. 19, 2005. | ||
| Claims priority of provisional application 60/663655, filed on Mar. 21, 2005. | ||
| Claims priority of provisional application 60/645837, filed on Jan. 21, 2005. | ||
| Prior Publication US 2006/0158274 A1, Jul. 20, 2006 | ||
| Int. Cl. H03L 7/00 (2006.01); H03L 7/04 (2006.01) | ||
| U.S. Cl. 331—16 [327/157; 327/161] | 16 Claims |
| 1. An integrated circuit comprising:
a phase detector and a voltage controlled oscillator coupled in series; and
a transmission line having an input coupled to at least one output of the voltage controlled oscillator, the transmission
line providing a time delay between the transmission line input and a transmission line output,
wherein the phase detector includes a first input coupled to the transmission line output and a second input coupled to at
least one output of the voltage controlled oscillator, wherein an entire propagation time delay between the transmission line
input and the transmission line output sets the frequency of the voltage controlled oscillator, and wherein the phase detector,
the voltage controlled oscillator, and the transmission line are integrated on a single integrated circuit, wherein the voltage
controlled oscillator output is conditioned to avoid locking onto fractional values of the entire propagation time delay.
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