BCS Telemetry List 25-Mar-92 Telemetry rate depends on the mode of the Solar-A DP. Revisions 11-OCT-88 Included micro DHK, Changed BCS-STS to 2 bytes 27-Oct-88 Corrected BCS-STS Cal ENABLE 6-Apr-89 Allocation and new format 18-Dec-89 Offsets put in, AHK 14-Apr-90 Micro related telemetery - FM code corrections 16-Apr 30-Apr-90 Futher revisions 18-May-90 Comments about AHK values 29-Jun-90 Corrections to AHK 23-Jul-90 Updated micro DHK, expanded PH 29-Jul-90 HV stuff, modified stim pattern, more micro stuff 23-Aug-90 More micro stuff 14-Sep-90 More micro stuff 04-Oct-90 Small corrections 20-Oct-90 More micro stuff 03-Nov-90 Corrections for V5B 11-Dec-90 Updated for version 6D/05 15-Jan-91 Some rewording in PH data section description 18-May-91 Updated for version 7A/08 24-Aug-91 Re-wrote PH data section 13-Oct-91 Mode improvements 28-Nov-91 ditto, added Kernel DHK 25-Mar-92 Some documentation improvements 3.2 Event Telemetry (BCS-PH) Telemetry Allocation:- Normal telemetry: 8 words/frame (W16n +5) Bit-rate (Low/Med/High) is dependant on DP mode. In High bit-rate, BCS-PH allocation is 2 Kbits/s. BCS-OUT mode: 64 words/frame (W16n +8 --> W16n +15) This high bit-rate mode is used to: a) empty the Queue memory after flare or at night-fall b) dump the microprocessor memory 3.2.1 Science Data Up to 1024 spectral bins can be accumulated every 0.125 seconds. The data is rebinned by the GROUPER as it is passed to the ACCUMULATOR and the number of spectral bins will normally be less than the maximum. The counts in each accumulator bin are compressed from a 16-bit, to an 8-bit number as the bin is passed from the ACCUMULATOR to the next processing stage. What happens next depends on whether the microprocessor is enabled or not: a) Micro-mode: Normally the spectral data is stored in a queue memory by the microprocessor, and then output to the PH data stream later. Although the BCS-PH telemetry blocks are read synchronously with the SF2 clock, in micro-mode the contents are totally asynchronous. This is because of the variable length of the accumulator blocks written to the Queue memory, and the delay in reading them out. When under micro control, the accumulator data is preceded by the following 13 bytes of header information: byte Contents 0,1 FF,FF hex - header sync. bytes 2 Low byte of time that mode accumulation started (BCS clock) * 3 High byte of time that mode accumulation started * 4 DP flags at start of mode * 5 BCS flags at start of mode (TFLGS2) * 6 Mode repeat counter 7 Tally used with accumulator control byte 8 ID of Grouper plan used in mode (Mode ID) 9 Accumulation time of mode (0.125s resolution) 10 Low byte of Accumulator length-1 11 0-1 MS 2 bits of Accumulator length-1 2-7 (reserved) 12 Accumulator control byte Accumulator length = (byte_11.and.3)*256 + byte_10 + 1 * These items are defined in section 3.3.2 Other items are detailed in section 3.2.6 b) Hardware-mode: In this mode, the spectral data is output directly to the PH interface. The rate of production of the data should be adjusted to match the PH data output rate by changing the Grouper Plan (note: only ROM grouper plans are available in this mode) and the accumulation time. To enter this mode, the microprocessor must be disabled and hardware mode selected. In hardware mode, each accumulator block is preceded by an FF,FF hex marker. 3.2.2 Other Micro-mode Science data items. a) Mode Block: Each time that a mode is started, the Mode Initialization Block (MIB) is written to the queue. This block is is of variable length and is preceeded by a FF,FF,FE,FE hex marker. It contains the definition of the current sequence and flare option, values relating to Great Flare and Fe XXVI Flare responses, and the definition of the two plans used for the RAM groupers (note: If a mode uses a ROM grouper plan, the definition must be obtained from the database). If MIB write is disabled, the MIB is only output at a sequence start. The definition of the MIB is as follows: byte Contents 0-3 Header FF,FF,FE,FE 4-18 Definition of the current Sequence (15 bytes - see defn. of a Sequence block) 19-24 Definition of the current Flare Option (6 bytes - see defn. of a Flare Option block) 25 Great Flare Sequence ID 26 Fe XXVI Flare Algorithm Threshold/16. 27 Fe XXVI Flare Algorithm Sequence ID 28 Fe XXVI Flare Algorithm Flare Option SLOT 29... Definition of Grouper Plan loaded in Grouper RAM 0 (variable length - see defn. of RAM Grouper Plan) +0 Grouper ID +1 -> +4 No. of sets in each channel (G01, G02, G03, G04) +5 -> +n Definition of the sets for each channel len_ROM0 = G01*2 + G02*2 + G03*2 + G04*2 + 5 29+len_ROM0... Definition of Grouper Plan loaded in Grouper RAM 1 (variable length - see defn. of RAM Grouper Plan) +0 Grouper ID +1 -> +4 No. of sets in each channel (G11, G12, G13, G14) +5 -> +n Definition of the sets for each channel len_ROM1 = G11*2 + G12*2 + G13*2 + G14*2 + 5 Total Block length = 29 + len_ROM0 + len_ROM1 b) End Marker: Each time that the BCS enters night (as defined by a command from the DP), a marker is written to the queue to indicate that the writing of data is suspended. This marker is FF,FF,FA,FA hex. c) Radiation Belt Entry Marker: When the BCS enters the radiation belt (as defined by the RBM flag, or the BCS's own SAA flag) a marker is written to the queue indicating that the writing of data has been suspended is written. This marker is FF,FF,FB,FB hex. d) Fast Queue Data: In mode A (pre-flare mode), when the Accumulator control byte is non-zero, data is written both to the normal Queue Memory and to the Fast Queue. Data in the normal queue continues to flow in and out as usual, but the data in the Fast Queue is only output is a flare occurs (i.e. when the mode changes to Mode B). The Fast Queue is a circular buffer 32 Kbytes long which continually wraps around. If a flare occurs as many 256 byte blocks as are required to cover the amount of the queue used are output. The dump is preceeded by a FF,FF,FD,FD,nn hex marker - the total number of 256 byte blocks dumped is indicated in the "nn" byte that follows the marker. The last record in the fast queue is followed by an end marker (FF,FF,FA,FA hex). If the fast queue has wrapped around, this marker can be in the middle of the 32 Kbyte block of data. In this case, the value of the "nn" byte will be 80 hex (128). If the fast queue has not wrapped around, the value of this byte will be less than 128 and the end marker will be contained within the last block dumped. When the dump of the fast queue has ended, the normal queue dump continues where it was interrupted (without any special marker to indicate this). e) Fill Data: When there is not enough spectral data available in the queue memory to provide 256 bytes for the PH buffer, fill data with a value of F9 hex is output to pad the supplied bytes out to 256. If the Queue is empty, fill data can occur in the within a mode record. 3.2.3 Fixed Extraction Data (Microprocessor Diagnostic Data) When the microprocessor is in normal (non-kernel) mode, and the BUF-PH copy is disabled (W66, F256n+94, bit 3), the microprocessor can output fixed length, 256 byte blocks of diagnostic data to the PH buffer. The type of data can be determined from the values held in the micro DHK variables PHB_OPT and PH3_FLD (both in W66, F256n+30). The various options allow small areas of the microprocessor memory (including the parameter area, Accumulator, and Grouper RAM) to be dumped, and test patterns to be generated. This method is used to produce the fixed length (256 byte) blocks of PH data during BCS calibrations. It should be noted that the values in the DHK data lag behind the PH data and it is best to recognise fixed extraction data by the 256 byte block length. 3.2.4 Microprocessor Dump Data When "commanded" to dump memory, the command interface outputs the dump directly to the PH interface. This can only be done with the CPU disabled. Memory dump has its own DP format. Memory dump is "commanded" by setting the DP flags BCS-QT/FL="0" and BCS-GFL/NFL="1". (See Section 3.1.3) 3.2.5 Definitions of BCS Microprocessor Lists The definitions of the lists used to control the BCS are defined below. These are dumped as part of the MIB (see section 3.2.2). FLARE OPTION Byte Purpose 0 Flare Option ID 1 Channel no. for flare detection 2 Flare Threshold (cps/16) 3 Down Threshold (cps/16) 4 Minimum Flare Duration (2 min units) 5 spare SEQUENCE Byte Purpose 0 Sequence ID 1 Mode A Grouper List ID (Pre-flare) 2 Accumulation time (0.125 s units) 3 Accumulator Control Byte 4 Mode B Grouper List ID 5 Accumulation time (0.125 s units) 6 Accumulator Control Byte 7 Max time in Mode B (6s units) 8 Mode C Grouper List ID 9 Accumulation time (0.125 s units) 10 Accumulator Control Byte 11 Max time in Mode C (6s units) 12 Mode D Grouper List ID 13 Accumulation time (0.125 s units) 14 spare GROUPER PLAN Byte Purpose 0 Grouper Plan ID. 1 No. of group sets (n1) for channel 1 2 No. of group sets (n2) for channel 2 3 No. of group sets (n3) for channel 3 4 No. of group sets (n4) for channel 4 5 -> 5+n1*2-1 Group sets of channel 1 5+n1*2 -> 5+(n1+n2)*2-1 Group sets of channel 2 5+(n1+n2)*2 -> 5+(n1+n2+n3)*2-1 Group sets of channel 3 5+(n1+n2+n3)*2 -> 5+(n1+n2+n3+n4)*2-1 Group sets of channel 4 A group set is: N_groups of M_bins 3.2.6 Explanation of other items in the Mode Header Record Mode ID. ID of Grouper plan used in mode. When a ROM grouper is used, the ID represents the location of the paln in th GRouper ROM. When a RAM plan is used, it is purely an ID and does not convey which RAM was used. Mode repeat counter A counter of the number of times the current mode has executed. Accum. Integration Time Integration time of the mode (0.125s units). Accum. Length Number of bytes of spectra in the mode. Accum. Control Byte This is a control counter which can be used in Modes A, B and C. In mode A, the Control Byte dictates how many spectra go to the Fast Queue, and how many to the normal Queue. In Modes B or C, the Control Byte detemines what fraction of the spectra are written to the Queue (the rest are rejected to save space in the Queue). Accum. Control Byte Tally The Tally indicates which values in the sequence controlled by the Control Byte this mode represents. In Mode A, a control byte of 8 sends 7 values (flagged by tally values of 0-6) to the Fast Queue, and one value to the normal Queue (tally values of 7). In Modes B or C, a control byte of 8 would record one record in the normal Queue (flagged by a tally byte of 7) and reject the rest. It should be noted that in mode A, the accumulator is only cleared when the tally byte is zero - each spectra in a set represents the continued accumulation from the zero tally byte state. To reconstruct higher time resolution data, sucessive spectra should be subtracted from each other. 3.3 Housekeeping Items Each BCS housekeeping stream is stored in a different word (indicated by Wn) of the (128 byte) spacecraft frame. Some streams are not stored in every frame. The actual allocation within a sub-frame, which consists of 64 frames, is given by the frame number (indicated by Fn). DHK, OS and STS are synchronized using the falling edge of clock SF2. The BCS contains four channels which are designated as: 1) Fe XXVI, 2) Fe XXV, 3) Ca XIX, 4) S XV Channels 1 and 2 are anodes 1 and 2 in the detector on spectrometer A, and channels 3 and 4 are anodes 1 and 2 in the detector on spectrometer B. Note: The anode 1 cell is the cell on the left when the detector is viewed, window uppermost, from the HV end (i.e. it is on the same side as the gas fill stem). This is the opposite to the nomenclature used by the detector group. Bit 0 is the LS bit and bit 7 the MS bit of a byte. 3.3.1 Analogue Telemetry (BCS-AHK) Telemetry Allocation:- (W32, F1n) The BCS analogue telemetry points are monitored directly by the AHK box. The contents of W32 relating to the BCS at (F128n + offset) are: Offset Contents Conversion Location Mult. Offset 32 BCS-A High voltage monitor 6.476 0.0 (SF2n F32) 33 BCS-B High voltage monitor 6.476 0.0 (SF2n F33) 95 BCS-A Crystal Temperature .5414 -58. (SF2n+1 F31) 96 BCS-B Crystal Temperature .5414 -53 (SF2n+1 F32) 97 BCS-E Box Temperature .5414 -58. (SF2n+1 F33) The high voltage value may be determined by multiplying the monitored value (in volts) by 331. Information about the temperature sensors is given in SOLAR-A-101, 6.3. All are of the Low Range type (-50 ~ +80 deg C). 3.3.2 Digital HK Data (BCS-DHK) Telemetry Allocation:- (W66, F1n) A BCS-DHK block consists of 32 bytes, output at 1 word/frame over 32 spacecraft frames (i.e. twice per sub-frame). Thus, during flare mode the 32 byte block is output each second. Interface is always powered, but the data will only valid at night if the digital electronics are on. The DHK data is not valid during memory patch and dump operations - at these times, the current load/dump address is displayed in the DHK data area (this address can be seen to increment as the load/dump progresses). Bit 7 is the MSB. The BCS-DHK block contents at (F32n + offset) are: Offset (hex) Contents 0-23 (00-17) Event counters (12 in total) 24-27 (18-1B) PHA data (subcommutated) 28-31 (1C-1F) Filled by microprocessor (subcommutated) 1) Assembled by hardware Event Counters: Four channels, each with 3 16-bit event counters. The counters rollover at FFFFh. Coutrates should be calculated by subtracting the previous sample, taking the sample period into account. Byte order is LS byte followed by MS byte. Channel designations are given under section 3.3 Offset (hex) Contents 0-5 (00-05) Channel 1 all/in-window/accepted counters 6-11 (06-0B) Channel 2 all/in-window/accepted counters 12-17 (0C-11) Channel 3 all/in-window/accepted counters 18-23 (12-17) Channel 4 all/in-window/accepted counters PHA data: Output from the 32 channel Pulse Height Analyser. PHA data is subcommutated over 8 BCS-DHK blocks, or 4 sub-frames, synchronous with the SF2 clock. PHA data is normally only used during an instrument calibration, but is always available. 2) Assembled by the microprocessor This field consists of 32 bytes and is subcommutated over 8 BCS-DHK blocks, or 4 sub-frames, synchronous with the SF2 clock. The data gathering routine is table driven, and the contents of W66 at (F256n + Moff) are currently: Moff. Table Entry No. and Contents "0" "1" 28 00 Low byte of BCS clock (resolution 0.125s) 29 01 High byte of BCS clock (resolution 0.125s) 30 02 bits 0-3 Selected fill of PH buffer if copy from BUFF to PH is disabled (PHB_OPT) 0 = Fill with descending count 1 = Fill with loaded value 2 = Fill with walking bit (value may be loaded) 3 = Dump area of memory from selected field 4 = Dump area of memory from loaded address (address loaded by cmds. 82,xx and 83,xx) 4-7 Selected address field when PHB_OPT=3 (PH3_FLD) 0 = Grouper Assembly area starting 4000H 1 = Grouper Assembly area starting 4200H 2 = Accumulator buffer, offset 0000H 3 = Accumulator buffer, offset 0100H 4 = Accumulator buffer, offset 0200H 5 = Accumulator buffer, offset 0300H Note: for values 2-5, the top 2 bytes are copied down 2. 31 03 Count of all executed command bytes 60 04 bits 0-3 BC's executed by micro 4-7 Command error count 61 05 Last received DC 62 06 Low byte of last received BC 63 07 High byte of last received BC 92 08 Flag byte TFLGS1 bit 0 BC ena/dis (micro) DIS ENA bit 1 Command Decode ena/dis (micro) DIS ENA bit 2 BC Received NO YES bit 3 PH data requested in PHA switching NO YES bit 4 QMM clash NO YES bit 5 QMM margin NO YES bit 6 Programme area checksum test OK ERR bit 7 Queue Memory test OK ERR 93 09 Flag byte TFLGS2 bit 0 SAA Threshold exceeded NO YES bit 1 Flare Threshold exceeded NO YES bit 2 HVU's turned off by BCS SAA alg. NO YES bit 3 Fe XXVI threshold exceeded NO YES bit 4 BCS is in night state NO YES bit 5 BCS is in SAA state NO YES bit 6 Status of BCS-QUE-STS (Data in Queue) LO HI bit 7 Status of BCS-FLR-FLG LO HI Moff. Table Entry No. and Contents "0" "1" 94 0A Configuration byte CONFG1 bit 0 Store data in Queue (from ARRAY) NO YES bit 1 Retrieve data from Queue (into BUFF) NO YES bit 2 Read data from ACC (into ARRAY) NO YES bit 3 Copy data into PH (from BUFF) NO YES bit 4 Use list from List Store Area NO YES bit 5 Execute set task on checksum failure NO YES bit 6 Reset List Store Area pointers NO YES bit 7 Output micro DHK data YES NO 95 0B Configuration byte CONFG2 bit 0 Respond to BCS Flare Algorithm flag NO YES bit 1 Respond to BCS SAA Algorithm flag NO YES bit 2 Respond to DP Flare Flag NO YES bit 3 Respond to DP RBM flag YES NO bit 4 Mode switching enabled NO YES bit 5 Respond to DP Great Flare NO YES bit 6 Use ACCumulator Control byte YES NO bit 7 Write Mode Initialization Block (MIB) YES NO 124 0C bits 0-3 bits 3-6 of hi byte of Fast Queue read address 4-7 bits 3-6 of hi byte of Fast Queue write address 125 0D bits 0-3 bits 3-6 of hi byte of Queue read address 4-7 bits 3-6 of hi byte of Queue write address 126 0E bits 0-3 Queue read page no. 4-7 Queue write page no. 127 0F Amount of Queue Memory free (0-5F) 156 10 Fe XXVI flare threshold/16 157 11 Time since mode started (6 sec units) 158 12 Max time in current mode (6 sec units) 159 13 bits 0-3 Count of PH buffers sent 4-7 Count of ACC swaps 188 14 Last received DP flags (see footnote) bit 0 BCS-RBM-FLG (Radn. Belt Monit.) NO YES bit 1 BCS-QT/FL (Flare status) "0" "1" bit 2 BCS-NFL/GFL (Flare status) "0" "1" bit 3 BCS-RATE-L (Bit rate 0) "0" "1" bit 4 BCS-RATE-H (Bit rate 1) "0" "1" bit 5 BCS-OUT-MOD1 (dump after flare) DIS ENA bit 6 BCS-OUT-MOD0 (dump at night fall) DIS ENA bit 7 BCS-OUT-STS (BCS-OUT happening) NO YES 189 15 Mode ID (ID of the current Grouper plan) 190 16 Accumulator usage control byte 191 17 Accumulator_Length/4 -1 (ACCLN4) DP Flare status bits have following meaning: Meaning Quiet Flare Gt. Flare Mem Dmp. BCS-NFL/GFL 0 0 1 1 BCS-QT/FL 0 1 1 0 DP Telemetry rates from the two bit rates are: 0 = LOW, 1 = MEDIUM, 2,3 = HIGH Moff. Table Entry No. and Contents "0" "1" 220 18 bits 0-3 Minimum flare duration (2 min units) (MIN_FLD) 4-5 Flare Algorithm channel (FLR_CHN) 6-7 SAA Algorithm channel (SAA_CHN) 221 19 Threshold used by SAA Detection Algorithm/16 (SAA_THRS) 222 1A Flare Threshold used by Flare Algorithm/16 (FLR_THRS) 223 1B Down Threshold used by Flare Algorithm/16 (DWN_THRS) 252 1C Sequence ID 253 1D bits 0-5 Time since orbit started (mins from ODAY) 6-7 Phase of sequence 254 1E Calibration flags, etc. (Note: cal. assembled by micro) bit 0 CAL-A ena/dis DIS ENA bit 1 CAL-A on/off OFF ON bit 2 CAL-B ena/dis DIS ENA bit 3 CAB-B on/off OFF ON bit 4 CAL normal/reverse FWD REV bit 5 List loading ena/dis DIS ENA bit 6 Mode load OK ERR bit 7 Sequence start OK ERR 255 1F Flare Option ID 3.3.2.1 Kernel Mode DHK During Kernel Mode, normal DHK data is no generated. The following bytes are set by the Kernel code to aid understanding of the cause of entry into Kernel and some of the commanding allowed in that mode (bytes 92-95 are only set if there is a stack error). All other bytes retain the last value they held. 28 "Time" counter to flag continued activity 29 Action/Entry Code 00h Normal Entry 11h KECOPY command complete 55h Entry caused by Watch Dog CCh Entry caused by Memory Check Failure EEh Entry caused by Stack Problem 30 Last received command byte 31 Command counter 60 7Ah Code Version number 61 08h Code revision number 62 00 63 Not defined 92 00h (only set if entry code = EEh) 93 00h (only set if entry code = EEh) 94 Lo byte of Stack Pointer (only set if entry code = EEh) 95 High byte of Stack Pointer (only set if entry code = EEh) 3.3.3 OS Interface (BCS-OS) Telemetry Allocation:- (W49, F2n) Interface cycles after 16 (32) bytes The interface is powered at night and valid data are always available. Bit 7 is the MSB. Contents of W49 at (F32n + offset) are: Offset Byte Contents "0" "1" No. 00 00 Channel 1, lower level SCA setting 02 01 Channel 1, upper level SCA setting 04 02 Channel 2, lower level SCA setting 06 03 Channel 2, upper level SCA setting 08 04 Channel 3, lower level SCA setting 10 05 Channel 3, upper level SCA setting 12 06 Channel 4, lower level SCA setting 14 07 Channel 4, upper level SCA setting 16 08 HV control bits 0-2 trim for HVA bits 4-6 trim for HVB 18 09 PHA control bits 0-5 accumulation time (time = (n*.5)-.125) s) bits 6-7 channel select 20 0A GROUPER control bits 0-5 ROM selection (1 of 64 plans) bit 6 RAM page select (1 of 2 plans) bit 7 Grouper ROM/RAM select RAM ROM 22 0B ACCUMULATOR timer resolution 1/8 secs. 24 0C ACCUMULATOR control bit 0 reserved bit 1 Accumulator clear ena/dis ENA DIS bit 2 Accumulator timer ena/dis DIS ENA bit 3 Hardware mode ena/dis ENA DIS 26 0D STIM control bit 0 Detector A int. stim gen. on/off ON OFF bit 1 Detector A stim source EXT INT bit 2 Detector A multiplexer ena/dis DIS ENA bit 3 - bit 4 Detector B int. stim gen. on/off ON OFF bit 5 Detector B stim source EXT INT bit 6 Detector B multiplexer ena/dis DIS ENA 28 0E CPU POWER control (used by CPU) 30 0F PH output byte (used by CPU) 3.3.4 Status Interface (BCS-STS) Telemetry Allocation:- (W112, F32n + 3,4,19,20) Interface cycles after 4 bytes. The interface is powered at night and valid data are always available. Bit 7 is the MSB. Contents of W112 at (F32n + offset) are: Offset Byte Contents "0" "1" No. 03 00 Spectrometer Status bit 0 CALB ena/dis (RLY 4) DIS ENA bit 1 HVB set/reset RES SET bit 2 HVB Power on/off (RLY 8) POF PON bit 3 Spectrometer B on/off (RLY 5 and 6) OFF ON bit 4 CALA ena/dis (RLY 3) DIS ENA bit 5 HVA set/reset RES SET bit 6 HVA Power on/off (RLY 7) POF PON bit 7 Spectrometer A on/off (RLY 1 and 2) OFF ON 04 01 Command Interface and other Status bit 0 Command Decode (direct deco)ena/dis ENA DIS bit 1 Programme Address Set ena/dis ENA DIS bit 2 Programme Load ena/dis ENA DIS bit 3 CPU processor ena/dis ENA DIS bit 4 Low RAM ena/dis DIS ENA bit 5 Watchdog Time ena/dis ENA DIS bit 6 Block Command (BC) ena/dis DIS ENA bit 7 Digital electronics on/off (RLY 9) OFF ON 19 02 Latest command byte 20 03 Last but one command byte