a memory controller including first and second memory ports respectively configured to drive first and second Fully Buffered Dual Inline Memory Module (FB-DIMM) memory channels, wherein each FB-DIMM memory channel comprises a unidirectional serial read channel and a unidirectional serial write channel respectively configured to communicate read and write data, wherein the first memory port in the memory controller includes a pair of unidirectional serial read and write ports respectively configured to couple to the unidirectional serial read and write channels of the first FB-DLMM memory channel, and wherein the second memory port in the memory controller includes a pair of unidirectional serial read and write ports respectively configured to couple to the unidirectional serial read and write channels of the second FB-DIMM memory channel;

a first plurality of FB-DIMM memory modules coupled to the unidirectional serial read and write channels of the first memory channel of the memory controller in a first daisy chain arrangement, each FB-DIMM memory module in the first plurality of FB-DIMM memory modules including a buffer device and a plurality of DRAM devices, and a last FB-DIMM memory module among the first plurality of FB-DIMM memory modules being disposed at an opposite end of the first daisy chain arrangement from the memory controller;

a second plurality of Fully Buffered Dual Inline Memory Module (FB-DIMM) memory modules coupled to the unidirectional serial read and write channels of the second memory channel of the memory controller in a second daisy chain arrangement, each FB-DIMM memory module in the second plurality of FB-DIMM memory modules including a buffer device and a plurality of DRAM devices, and a last FB-DRAM memory module among the second plurality of FB-DRAM memory modules being disposed at an opposite end of the second daisy chain arrangement from the memory controller; and

a bridging interconnect coupling together the last FB-DIMM memory modules from the first and second pluralities of FB-DIMM memory modules to enable data to be communicated over one of the first and second memory channels between the memory controller and a FB-DIMM memory module coupled to the other of the first and second memory channels, wherein the bridging interconnect comprises first and second unidirectional interconnects, the first unidirectional interconnect coupling the read channel of the first FB-DIMM memory channel to the write channel of the second FB-DIMM memory channel, and the second unidirectional interconnect coupling the write channel of the first FB-DIMM memory channel to the read channel of the second FB-DIMM memory channel.