18-Sep-96 updated 10-Nov-98 Kevin Pitts COT Calibration Specs Purpose: 1. calibrate channel-to-channel t_0's note: the overall t0 (i.e. the event t0) comes from the data channel-to-channel offsets come from calibration 2. diagnostics and debugging Functionality: -One calibration circuit will reside on each ASDQ chip. 1. The ASDQ requires two DC calibration voltage levels (TREFE and TREFO for even and odd channels) which determine the amount of charge injected. -A calibration strobe will be delivered to the board, which will trigger the calibration circuit, injecting the charge into the front end of each ASD channel. This will be repeated n times at 4-5 different locations within the drift window: example: for 132ns running, 15 pulses each at 10ns, 30ns, 50ns, 80ns and 110ns. Constraints: -The calibration strobe must be accurate to 1/2ns channel-to-channel and be delivered differentially down the middle pair of the signal cable bundle. -We will measure the relative slot-to-slot delay in the VME crates, as well as any other potential channel-to-channel timing differences. -The calibration voltages will be delivered by superlayer by quadrant to the ASD boards in a manner similar to the LV distribution. Baseline system: -A BNC model B950 digital delay generator will sit in the first floor VME calibration crate. The calibration crate will reside near the COT HV. The B950 will output a NIM logic level on the front panel. -The output of the B950 will be carried by coax cable to a the calibration conversion module in a nearby slot in the same crate. The calibration conversion module will convert the signal from single-ended NIM to differential PECL and fan the signal out 1-to-8. (It might be nice to have a ninth copy of the calib pulse on the front panel for a scope trigger, etc.) -The output of the calibration conversion module will be delivered by twinax (polyethylene) cable to the calibration fanout modules in each of the eight corners of the detector. All cables the same length. -The calibration fanout module will sit in the middle VME crate of the triplet of crates in each corner and have the following functionality: 1. fanout the calibration signal 1-to-3 2. be a 6U-to-9U adaptor for a DAC module There will be four twinax front panel connectors: 1 input and three outputs. The fanout will receive and drive PECL. -Twinax cables will carry the output from the fanout module to the twinax input on the TRACER modules in the three VME crates. -The TRACER receives PECL and puts it on the backplane. -The TDC modules receive PECL and drive ECL out the calibration lines of the four front panel inputs. -The ASDQ receives the differential ECL calibration pulse. Responsibilities: 1. Interface between PDG and DAQ system: Yale 2. calibration interface card (NIM->PECL, 1->8) fanout card (1->3, adaptor for DAC) PECL pulser for local test/debugging: Duke 3. TDC->repeater->ASDQ: FNAL, Penn 4. LV control (dE/dx calib) FNAL, Penn 5. software Duke? Action items: 1. Check on space for 8 twinax cables. 2. Check specs on twinax cables (delay vs. temp.) Steve Chappa recommends Trompeter TWC-124-2. We need to track down some specs. He has a 150' we can borrow for tests. 3. Spec. DACs 4. measure the delay in->out for ASDQ The delay from the time the calibration strobe enters the ASDQ daughterboard until the ASDQ fires is about 12nsec. 5. estimate variation in delays for cables+backplane.