| US 7,393,726 B2 | ||
| Thin film transistor array panel and methods for manufacturing the same | ||
| Dong-Gyu Kim, Kyungki-do (Korea, Republic of); and Jong-Soo Yoon, Choongchungnam-do (Korea, Republic of) | ||
| Assigned to Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do (Korea, Republic of) | ||
| Filed on Mar. 16, 2006, as Appl. No. 11/378,714. | ||
| Application 11/378714 is a continuation of application No. 10/273298, filed on Oct. 18, 2002, granted, now 7,098,480, filed on Aug. 29, 2006. | ||
| Application 10/273298 is a continuation of application No. 09/558647, filed on Apr. 26, 2000, granted, now 6,759,281, filed on Jul. 06, 2004. | ||
| Claims priority of application No. 1999-14896 (KR), filed on Apr. 26, 1999; application No. 1999-14898 (KR), filed on Apr. 26, 1999; and application No. 2000-19712 (KR), filed on Apr. 14, 2000. | ||
| Prior Publication US 2006/0157712 A1, Jul. 20, 2006 | ||
| This patent is subject to a terminal disclaimer. | ||
| Int. Cl. H01L 21/00 (2006.01); H01L 29/04 (2006.01) | ||
| U.S. Cl. 438—149 [257/72] | 38 Claims |
| 1. A method for manufacturing a thin film transistor array panel for a liquid crystal display, comprising the steps of:
forming a gate wire including a gate line and a gate electrode connected to the gate line on an insulating substrate;
forming a gate insulating layer covering the gate wire;
forming a semiconductor pattern on the gate insulating layer;
forming a data wire including a source electrode, a drain electrode and a data line connected to the source electrode on the
semiconductor pattern, wherein the gate insulating layer, the semiconductor pattern and the data wire are patterned in a single
photolithography step;
forming color filters made of photosensitive material, the color filters covering data wire and having a first contact hole;
and
forming a pixel electrode connected to the drain electrode through the first contact hole of the color filters.
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