Metrology for System-on-a-Chip
Contact: Allen R. Hefner, Jr.
GOALS
One of the key metrology issues confronting the semiconductor System-on-a-Chip (SoC) industry is the development of measurement methods and standards for characterizing embedded-sensor (ES) Virtual Components (ES-VCs), a critical class of building blocks from which SoCs are developed. The goal of this project is to promote and support the development of hardware and software standards for specifying ES-VCs compatible with the SoC integration methodology used for digital IC design. This goal has been extended to include SoC compatibility with the IEEE 1451 series of sensor communication network standards at the request of one of the project sponsors.
This NIST effort will enable ES-VCs to be included in SoC computer-aided design (CAD) libraries and enable integration of ES-VCs with the existing digital VCs used ubiquitously by industry to design large ICs. The methods and standards developed as a result of this work will be essential for the realization of integrated, low-cost, smart homeland security and environmental sensor systems. One focus is on delivering standards to facilitate the incorporation of multi-technology (MT) VCs including MEMS (Micro-Electro-Mechanical Systems)-based VCs into SoCs.
The project activities include the development of: multi-technology hardware description language (HDL) models, VC interface standards, synthesis and scaling standards for ES-VCs compatible with digital methodologies, testing standards, verification standards, and high-level models of system components. The NIST MEMS-based integrated gas-sensing VC is used as a test bed to demonstrate the viability of these standards. In addition, the demonstration of general purpose gas-sensing VC methodologies is used to facilitate the adoption of these MT-VCs into new Homeland Security and industrial applications.
ACCOMPLISHMENTS
- Investigated existing and emerging SoC design methodologies and adapted digital SoC design tool-flow to enable integration of mixed-signal MEMS VCs.
- A four element gas-sensor VC was success-fully designed, fabricated, and electrically char-acterized to demonstrate that the design approach was compatible with SoC design methodology. The performance of the 8-bit analog-to-digital converter (ADC) exceeded the gas-sensor VC design requirements.
- Electrostatic discharge (ESD) protection structures were added to the gas-sensor and successfully tested. These ESD test structures are based on multi-finger thyristor-type devices and are designed to achieve optimum performance and reduced area.
- A new post-process etching technique was developed to integrate MEMS devices with standard submicron CMOS processes and a new microhotplate design that scales with standard CMOS structures and voltage levels. This will enable co-integration of MEMS sensor devices with high density submicron digital systems using cost effective standard CMOS foundries. The submicron gas-sensor test chip was characterized. Characterization data showed the new scalable microhotplate will provide the temperature required for gas-sensor operation at 3.3 V.
- Methodologies for designing digital interface shell functionality for ES-VCs were developed and demonstrated by designing the gas sensor SoC architecture.
- A high-level model of the microhotplate gas sensor ES-VC was developed. A HDL-based microcontroller core was synthesized for a 0.25 µm standard CMOS fabrication process. High-speed SystemC models of the microcontroller and microhotplate were developed to facilitate SoC software design and protocol development. This is the first time a MEMS device has been modeled in SystemC, and the results demonstrated the importance of including MEMS-device models in high level system modeling
- Microhotplate-based gas-sensor yield was im-proved by adopting a new chromium etchant.
- A computer-controlled gas-delivery system was designed, assembled, and tested. The gas delivery protocols for calibrating the microhot-plate-based gas sensors were designed and im-plemented.
- A submicron-microhotplate test-structure chip was designed to compare the performance of different CMOS compatible temperature sensors and to measure the contact resistance between different types of post-processed gas sensor electrodes. This chip also supports the extraction of more accurate microhotplate thermal-model parameters.
