CDF Note No. 152 THE CDF EVENT STRUCTURE Version 4.01 Kurt Biery, Craig Blocker, Terry Carroll, Henry Frisch, Steve Hahn, John Huth, Cathy Newman-Holmes, Jim Patrick, Jim Proudfoot, David Quarrie, Phil Schlabach, Marjorie Shapiro, Pekka Sinervo (and anybody else who feels their name should be here) 18 March 1994 TABLE OF CONTENTS CONTENTS 1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . 6 2 COORDINATE SYSTEM . . . . . . . . . . . . . . . . . 7 3 NUMBERING . . . . . . . . . . . . . . . . . . . . . 7 4 CLUSTERING . . . . . . . . . . . . . . . . . . . . . 8 5 LOGICAL RECORD AND BANK FORMATS . . . . . . . . . . 9 6 EVENT RECORD BANKS . . . . . . . . . . . . . . . . 10 6.1 LRID Bank - Logical Record IDentifier Bank . . . 10 6.2 EVCL Bank - EVent CLassification Bank . . . . . 13 6.3 EVCD Bank - Full Level 0-3 Trigger Bits . . . . 18 6.4 TPID Bank - TaPe IDentification Bank . . . . . . 20 7 DETECTOR COMPONENT BANKS . . . . . . . . . . . . . 22 7.1 Detector Component Bank Structure . . . . . . . 22 7.2 Detector Component Bank Names . . . . . . . . . 24 7.3 VTWD Bank - VTPC Wire Raw Data Bank . . . . . . 31 7.4 CTCD Bank - CTC Raw Data Bank . . . . . . . . . 35 7.5 CDTD Bank - Central Drift Tubes Detector Bank . 39 7.6 CEMD Bank - Central EM Calorimeter Bank . . . . 42 7.7 CSID Bank - Central 90 Degree Crack Filler Detector Bank . . . . . . . . . . . . . . . . . 44 7.8 CESD Bank - Central EM Calorimeter Strips Bank . 46 7.9 CCRD Bank - Central Crack Detector Bank . . . . 48 CDF-152 Page 2 7.10 PEMD Bank - Endplug EM Calorimeter Cathode Pad Bank . . . . . . . . . . . . . . . . . . . . . . 50 7.11 PEAD Bank - Endplug EM Calorimeter Anode Bank . 52 7.12 PESD Bank - Endplug EM Calorimeter Strips Bank . 54 7.13 LUMD Bank - Instantaneous Luminosity Bank . . . 56 7.14 FEMD Bank - Forward EM Calorimeter Cathode Pad Bank . . . . . . . . . . . . . . . . . . . . . . 57 7.15 FEAD Bank - Forward EM Calorimeter Anode Bank . 59 7.16 FHXD Bank - Forward Hadron Calorimeter Anode Bank 61 7.17 CHAD Bank - Central Hadron Calorimeter ADC Bank 63 7.18 CHTD Bank - Central Hadron Calorimeter TDC Bank 65 7.19 WHAD Bank - Endwall Hadron Calorimeter ADC Bank 67 7.20 WHTD Bank - Endwall Hadron Calorimeter TDC Bank 69 7.21 PHAD Bank - Endplug Hadron Calorimeter Cathode Pad Bank . . . . . . . . . . . . . . . . . . . . 71 7.22 PHWD Bank - Endplug Hadron Calorimeter Anode Bank 73 7.23 FHAD Bank - Forward Hadron Calorimeter Cathode Pad Bank . . . . . . . . . . . . . . . . . . . . 75 7.24 FHWD Bank - Forward Hadron Calorimeter Anode Bank 77 7.25 CMUD Bank - Central Muon Detector Bank . . . . . 79 7.26 TCMD Bank - Trigger Central Muon Matchbox Detector Bank . . . . . . . . . . . . . . . . . 81 7.27 FMUD Bank - Forward Muon Wire Detector Bank . . 85 7.28 FMCD Bank - Forward Muon Counter Detector Bank . 89 7.29 FMSD Bank - Forward Muon Strip Detector Bank . . 93 7.30 FMTD Bank - Forward Muon Timing Detector Bank . 96 7.31 BBCD Bank - Beam Beam Counters Raw Data Bank . . 99 7.32 BBLD Bank - Beam Beam Counters Latch Data Bank . 101 7.33 CSXD Bank - Raw Data Bank For The Scintillators Of The Central Muon Extension . . . . . . . . . 102 7.34 CXRD Bank - Central Muon Extension Raw TDC Data Bank . . . . . . . . . . . . . . . . . . . . . . 106 7.35 CURD Bank - Central Muon Upgrade Raw TDC Data Bank . . . . . . . . . . . . . . . . . . . . . . 108 7.36 CSRD Bank - Central Muon Extension Scintillators Raw TDC Data Bank . . . . . . . . . . . . . . . 110 7.37 SCLD Bank - Scaler Data Bank . . . . . . . . . . 112 7.38 LATD Bank - Misc Latch, ADC And TDC Detector Bank . . . . . . . . . . . . . . . . . . . . . . 116 7.39 TL2D Bank - Level 2 Trigger Detector Bank, 1992 Version . . . . . . . . . . . . . . . . . . . . 118 7.40 TNND Bank - Level 2 Calorimeter Neural Net Trigger Bank . . . . . . . . . . . . . . . . . . 130 7.41 TCSD Bank - Level 2 Trigger Interceptor Bank . . 136 7.42 TFRD Bank - CDF FRED Detector Bank . . . . . . . 144 7.43 TRCD Bank - Raw/Cas Sum Registers . . . . . . . 147 7.44 BFLD Bank - B Field Detector Bank . . . . . . . 152 7.45 CFHD Bank - Ctc Fast Track-finder Hit Bank . . . 154 7.46 CPTD Bank - CENTRAL PENN TRACK Detector Bank . . 156 7.47 TBMD Bank - Block Mover Bank . . . . . . . . . . 160 7.48 CFWD Bank - CTC Fast Track Finder Track Data Bank . . . . . . . . . . . . . . . . . . . . . . 164 7.49 CPMD Bank - CENTRAL PENN TRACK Ram Dump Bank . . 167 7.50 TTLD Bank - Level 2 Track List Bank . . . . . . 171 CDF-152 Page 3 7.51 LULD Bank - Telescope Counters Latch Data Bank . 174 7.52 SVXD Bank - Silicon Vertex Detector Raw Data Bank . . . . . . . . . . . . . . . . . . . . . . 175 7.53 VTRD Bank - VTPC Raw TDC Data Bank . . . . . . . 180 7.54 CTRD Bank - CTC Raw TDC Data Bank . . . . . . . 182 7.55 TUPD Bank - Level One Trigger Central Muon Upgrade Detector Bank . . . . . . . . . . . . . 184 7.56 TEXD Bank - Level One Trigger Central Muon Extension Detector Bank . . . . . . . . . . . . 187 7.57 CEGD Bank - Central EM High Gain Calorimeter Bank . . . . . . . . . . . . . . . . . . . . . . 189 7.58 CMRD Bank - Central Muon Upgrade Scintillators Raw TDC Data Bank . . . . . . . . . . . . . . . 191 7.59 ERRD Bank - Error Reporting Bank . . . . . . . . 193 7.60 ALMD Bank - MX Alarms And Limits Monitoring Bank 197 7.61 CSPD Bank - Raw Data Bank For The Scintillators Of The Central Muon Upgrade . . . . . . . . . . 199 7.62 TMXD Bank - MX Scanner Time Bank . . . . . . . . 203 7.63 PRMD Bank - RABBIT Card PROM Digital Data Bank . 205 7.64 TODD Bank - Time Of Day Detector Bank . . . . . 207 7.65 MTPD Bank - MX Test Partition Bank . . . . . . . 208 7.66 CPRD Bank - Central Preradiator Bank . . . . . . 210 7.67 CMXD Bank - Central Muon Extension Raw Data Bank 212 7.68 CMPD Bank - Central Muon Upgrade Raw Data Bank . 216 8 CALIBRATION EVENT BANKS . . . . . . . . . . . . . 220 8.1 VTWX Bank - VTpc Wire Calibration Summary Bank. 221 8.2 CTCX Bank - CTC Calibration Summary Bank . . . 224 8.3 CEMX Bank - Central EM Calorimeter MX Calibration Summary Bank . . . . . . . . . . . . 227 8.4 CHAX Bank - Central Hadron Calorimeter MX Calibration Summary Bank . . . . . . . . . . . . 229 8.5 WHAX Bank - Endwall Calorimeter MX Calibration Summary Bank . . . . . . . . . . . . . . . . . . 231 8.6 CTPD Bank - Central Calorimeter Temperature Probe Raw Data Bank . . . . . . . . . . . . . . 233 8.7 CTPX Bank - Central Calorimeter Temperature Probe MX Calibration . . . . . . . . . . . . . 235 8.8 CSDD Bank - Central Calorimeter Cs-137 Source Drive Raw Data Bank . . . . . . . . . . . . . . 237 8.9 CSDX Bank - Central Calorimeter Cs-137 Source Drive MX Calibration . . . . . . . . . . . . . 239 8.10 CCDD Bank - Central Calorimeter Digital Data Raw Data Bank . . . . . . . . . . . . . . . . . . . 241 8.11 CECD Bank - Central EM Calorimeter Current Channel Raw Data Bank . . . . . . . . . . . . . 243 8.12 CHCD Bank - Central Hadron Calorimeter Current Channel Raw Data Bank . . . . . . . . . . . . . 245 8.13 WHCD Bank - Endwall Calorimeter Current Channel Raw Data Bank . . . . . . . . . . . . . . . . . 247 8.14 LSAD Bank - Hadron Calorimeter Laser System ADC Bank . . . . . . . . . . . . . . . . . . . . . . 249 8.15 LSTD Bank - Hadron Calorimeter Laser System TDC Bank . . . . . . . . . . . . . . . . . . . . . . 251 CDF-152 Page 4 8.16 CPND Bank - Central EM Calorimeter PIN Diode Raw Data Bank . . . . . . . . . . . . . . . . . . . 252 8.17 CPNX Bank - Central EM Calorimeter PIN Diode MX Calibration . . . . . . . . . . . . . . . . . . 254 8.18 SVXX Bank - Silicon Vertex Detector Xmode Data Bank . . . . . . . . . . . . . . . . . . . . . . 256 8.19 CMXX Bank - Central Muon Extension Calibration Summary Bank . . . . . . . . . . . . . . . . . . 262 8.20 CMPX Bank - Central Muon Upgrade Calibration Summary Bank . . . . . . . . . . . . . . . . . . 265 9 TEST BEAM DATA BANKS . . . . . . . . . . . . . . . 267 9.1 UEMD Bank - Plug Upgrade EM Calorimeter Bank . . 268 9.2 UHAD Bank - Plug Upgrade HAD Calorimeter Bank . 270 9.3 UECD Bank - Plug Upgrade EM Calorimeter Currents Bank . . . . . . . . . . . . . . . . . . . . . . 272 9.4 UHCD Bank - Plug Upgrade HAD Calorimeter Currents Bank . . . . . . . . . . . . . . . . . 274 9.5 UEPD Bank - Plug Upgrade EM Calorimeter Position Detector . . . . . . . . . . . . . . . . . . . . 276 9.6 SABD Bank - Small Angle Beam Test Data . . . . . 278 9.7 LSCD Bank - Test Beam Latch And Scaler Data Bank 281 9.8 TBCD Bank - Test Beam Camac Data Bank . . . . . 283 9.9 TBSD Bank - Test Beam Stand Positions Data Bank 285 9.10 SVTD Bank - SVX Temperature Detector Bank . . . 287 9.11 MAGD Bank - Test Beam MT5E-String Current Data . 289 10 LEVEL 3 BANKS . . . . . . . . . . . . . . . . . . 291 10.1 L3HD Bank - Level 3 Header Bank . . . . . . . . 292 10.2 ENDD Bank - End Of Data Bank . . . . . . . . . . 297 11 ALARMS AND LIMITS BANKS . . . . . . . . . . . . . 300 11.1 FMUH Bank - Forward Muon High Voltage Bank . . . 301 11.2 FTCH Bank - Forward Tracking High Voltage Bank . 303 11.3 CESH Bank - Central Strip High Voltage Bank . . 305 11.4 CMUH Bank - Central Muon High Voltage Bank . . . 307 11.5 CDTH Bank - Central Drift Tube High Voltage Bank 309 11.6 VTPH Bank - VTPC High Voltage Bank . . . . . . . 311 11.7 VTTH Bank - CTC And VTPC Temperature Tolerance Bank . . . . . . . . . . . . . . . . . . . . . . 313 APPENDIX A DIFFERENCES BETWEEN VERSIONS A.1 DIFFERENCES BETWEEN V2.00 AND V1.00 . . . . . . . A-1 A.2 DIFFERENCES BETWEEN V2.3 AND V2.2 . . . . . . . . A-2 A.3 DIFFERENCES BETWEEN V2.31 AND V2.3 . . . . . . . . A-3 A.4 DIFFERENCES BETWEEN V2.32 AND V2.31 . . . . . . . A-3 A.5 DIFFERENCES BETWEEN V2.33 AND V2.32 . . . . . . . A-3 A.6 DIFFERENCES BETWEEN V2.34 AND V2.33 . . . . . . . A-4 A.7 DIFFERENCES BETWEEN V2.4 AND V2.34 - MARCH 5, 1987 A-4 A.8 DIFFERENCES BETWEEN V2.41 AND V2.4 - MARCH 20, 1987 . . . . . . . . . . . . . . . . . . . . . . . A-4 CDF-152 Page 5 A.9 DIFFERENCES BETWEEN V2.42 AND V2.41 - MARCH 26, 1987 . . . . . . . . . . . . . . . . . . . . . . . A-5 A.10 DIFFERENCES BETWEEN V2.43 AND V2.42 - APRIL 15, 1987 . . . . . . . . . . . . . . . . . . . . . . . A-5 A.11 DIFFERENCES BETWEEN V2.44 AND V2.43 - MAY 26, 1987 A-5 A.12 DIFFERENCES BETWEEN V2.5 AND V2.44 - SEPT 22, 1987 A-5 A.13 DIFFERENCES BETWEEN V2.51 AND V2.5 - OCT 1, 1987 . A-6 A.14 DIFFERENCES BETWEEN V2.52 AND V2.51 - OCT 7, 1987 A-6 A.15 DIFFERENCES BETWEEN V2.53 AND V2.52 - OCT 28, 1987 A-6 A.16 DIFFERENCES BETWEEN V2.6 AND V2.53 - NOV 20, 1987 A-6 A.17 DIFFERENCES BETWEEN V2.61 AND V2.6 - DEC 27, 1987 A-7 A.18 DIFFERENCES BETWEEN V2.70 AND V2.61 - APR 26, 1988 A-7 A.19 DIFFERENCES BETWEEN V2.80 AND V2.70 - JUNE 20, 1988 . . . . . . . . . . . . . . . . . . . . . . . A-7 A.20 DIFFERENCES BETWEEN V2.90 AND V2.80 - JULY 8, 1988 A-8 A.21 DIFFERENCES BETWEEN V3.00 AND V2.90 - AUGUST 30, 1988 . . . . . . . . . . . . . . . . . . . . . . . A-8 A.22 DIFFERENCES BETWEEN V3.10 AND V3.00 - MARCH, 1990 A-9 A.23 DIFFERENCES BETWEEN V3.11 AND V3.10 - JUNE 1990 . A-9 APPENDIX B VARIOUS DEFINITIONS B.1 EXPERIMENT TYPES . . . . . . . . . . . . . . . . . B-1 B.2 RUN TYPES . . . . . . . . . . . . . . . . . . . . B-1 B.3 RECORD TYPES . . . . . . . . . . . . . . . . . . . B-2 B.4 CDF COMPUTER IDS . . . . . . . . . . . . . . . . . B-2 B.5 PARTITION NUMBERS . . . . . . . . . . . . . . . . B-3 B.6 PROCESS IDS . . . . . . . . . . . . . . . . . . . B-3 CDF-152 Page 6 INTRODUCTION ____________ 1 INTRODUCTION The basic form of the event structure is derived from the fact that all event-related data originates from electronics channels within Scanners (being either an MEP+MX combination or a SSP). Each Scanner handles the data either for a particular detector component or in some cases for all components within a localised region of the detector. Thus the basic identification for a particular electronics channel is:- (Scanner ID, Channel ID) where the Scanner ID uniquely identifies the geographic location of the scanner and the Channel ID uniquely identifies the particular electronics channel within the scanner. Each Scanner produces a YBOS bank so that the basic identification becomes:- (Bank Name, Scanner ID, Channel ID) This organisation is rather un-natural in that it has a rather remote relationship to what the physicist would like to have, namely:- (Detector Component, Module ID, Channel ID) Note that there is not a one-to-one correspondence between Scanner Bank Name and Detector Component because of the layout of Scanners. One example of this is the Central Wedges; all components in a particular (Rapidity, Azimuth) range are readout by a scanner that therefore contains data from EM Calorimetry modules, Hadron Calorimetry modules and Muon Chamber modules. Furthermore there are several components where the Channel ID is itself composite, examples being the Calorimeters which are segmented in Rapidity, Azimuth and depth. One possible approach would be that each application program would contain a "map" (perhaps hidden from the user by a subroutine call) so that the user could request the data from a particular physical channel and in some magical fashion he would receive it. This is not only tedious and slow but would also require a fairly large table or subroutine to be slung around the necks of all users. The ideal situation would be to reformat the data in such a way that it was easily accessible under the physicist mode of access. This would minimise the mapping and the burden of tables or subroutines. This is the approach that has been chosen for CDF, where the responsibility for the Reformatting CDF-152 Page 7 INTRODUCTION is the Event Builder's. This is a FASTBUS object (or process on the VAX in the early stages of the experiment) that reads in the individual Scanner Banks and forms the new Component Oriented Banks from them. Thus the physicist will only have available to him the Component Oriented Banks. This document discusses only the Component Oriented event organisation, the Scanner oriented organisation being described in detail in another document. In effect, what is described here is the raw data format for the CDF experiment. Before a detailed discussion of this data structure, the coordinate system, numbering schemes and other related topics will be discussed. __________ ______ 2 COORDINATE SYSTEM The Coordinate system is the standard CDF one, namely:- 1. The positive z axis is in the direction of the protons 2. The positive y axis is vertical. 3. The positive x axis points out of the ring 4. Polar angle theta is zero along z axis. 5. Polar angle phi is zero along the x axis and increases from the positive x axis to the positive y axis. _________ 3 NUMBERING The Numbering scheme within each Detector Component is essentially the same as that proposed by R. Kadel except that all indices are in the range 0 through n-1. Most of our detector components are segmented in azimuth, rapidity and depth. The numbering scheme is the following:- 1. Azimuth Segmentation. Channel 0 corresponds to 0 4.0 TDCs all channels read out Thus, a total of 64 TDCs is required. 2. Address of first word in TDC pointer block for phi slice PSi: Address_PSi = VTWD_Data_Index + VTWD(VTWD_Data_Index + 1 + PSi) = IW(INDDAT + 1 + PSi) for data in YBOS array IW Address_PSi = Address_PS(i+1) ==> no data in PSi 3. Address of first wire hit datum in TDC Cj: Address_Cj = Address_PSi + VTWD(Address_PSi + 1 + Cj) Address_Cj = Address_C(j+1) ==> no data in TDC Cj 4. Minimum bank length for no data (i.e., YBOS "length of data") = 10 CDF-152 Page 35 DETECTOR COMPONENT BANKS 7.4 CTCD Bank - CTC Raw Data Bank This bank has TDC data for the Central Tracking Chamber. The present CTC Detector Bank format for raw CTC data, specified in this document, provides pointers allowing rapid access to any TDC in each super layer of the CTC. The format is designed to allow convenient checking of the integrity and consistency of the data read out from the LRS 1879 TDCs used in the CTC, VTPC, and FTC CDF dectector systems. This detector bank format, with TDC data ordered first by channel number and then by time, can be provided by the SLAC Scanner Processor (SSP) at moderate Level 2 trigger rates (10-20 Hz) but will require a new FASTBUS module to order and reformat the TDC data at higher trigger rates. The detector raw data stored in such a CTCD bank are read and printed out by the routine CTCDPT. The DPT routine prints out detected non-standard data together with a message indicating the existence of such corrupt data. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each super layer. Each of the 9 super layers is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. Here, the term "pointer" means an "offset from the start of the current block" rather than an absolute address. All data are packed in I*4 words. This Bank has the following Bank Header Characteristics:- Bank Name : "CTCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) CDF-152 Page 36 DETECTOR COMPONENT BANKS The CTCD bank format is: _______ ________ Address Contents ________________________ INDDAT+0 | Number of SL pointers| Block A +1 | PSL# = pointers to | . | each SL | Super Layer pointer . | | block +11 | Pointer - end of data| ________________________ | | PSL0 | Number of TDCs | Block B0 PSL0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for Super Layer 0 ________________________ | | PSL0 + PC0 | Data for TDC 0 | Block B1 . | " | . | | Data for Super Layer 0 PSL0 + PCN | Data for TDC N | . | " | . | | ________________________ | | PSL1 | Number of TDCs | TDC pointer block . | PC# = TDC Pointers | for Super Layer 1 ________________________ | | . | Data | . | | __________________________________ Block A: Super Layer Pointer Block ____ ________ word Contents 0 NSL = # of super layers (9) + 1 = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NSL-1 = pointer to end of YBOS bank + 1 for i = NSL ____________________________________________________ Block B0(i): TDC pointer sub-block for super layer i ____ ________ word Contents 0 NTDC(i) = number of TDCs in super layer i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) CDF-152 Page 37 DETECTOR COMPONENT BANKS It is permissable, if the entire super layer is empty of data, that the block B0(i) be omitted entirely. The super layer pointer in block A MUST be present in all cases, though it may just indicate a missing super layer by its pointer offset value. In blocks pertaining to super layers with data, each TDC has an entry in this pointer block even if there are no hit data. Entries in these TDC pointer blocks are defined as follows: bits 0-15 pointer to start of hit data for TDC j 16-31 available bits, potentialy available to flag detected corrupt or incomplete data Bit 30 is set when the TDC is not fully read out. (This condition arises when the are too many hits in this TDC. If this is so, various wire/hit limits are invoked, and not all data present are read out, in order to avoid overflowing buffer size limits.) __________________________________________________________ Block B1(i,j): Hit data sub-block for super layer i, TDC j TDC data have the following format: bits 0- 9 T = Leading edge TDC count. (10 bits; bit 0 is the "phase" bit) 10-18 L = Trailing edge clock count. (9 bits, aligned with bits 1-9) 19-25 C = Channel number within this TDC. (0:95 are "legal" channels) 30 N = Flag bit, indicating that the data on this wire were not completely read out. (For the CTC, there are a maximum of 15 hits on a wire in the read out. N=1 flags this.) 31 S = Stop bit = 1 for last hit on this wire. Only channels with hit data appear in these blocks. The 96 channels 0:95 are potentially legal channels. In 5 of the 9 super layers, there remain more legal channels than are read out. Both CTCDPT and CTCDTE check these channel numbers, and report anomalous conditions. In the actual read out of a super layer, wires in a single cell are read out as adjacent TDC channels, ordered in increasing radial separation from the beam axis. Hits on each wire are ordered in time. The read out of TDC0 commences with cell 0 and increases with azimuth. The remaining TDCs are ordered in increasing azimuth. CDF-152 Page 38 DETECTOR COMPONENT BANKS There exists the possibility that the read out produces a different number of leading and trailing edge digitizations. In this case, by convention, the SSP fills in a "0" for a missing trailing edge asociated to a leading edge, and a "511" for a leading edge that is missing the corresponding trailing edge. Both these anomalous conditions are checked by the CTCDPT/CTCDTE routines. ______ Notes: 1. For the CTC, there are an integral number of TDCs for each super layer, as TDC readout is not extended accross a super layer boundry. The exact case is as follows: super layer 0 (30 cells)X(12 wires)= (360 channels)/(96 TDC channels) 0 30 12 ==> 3.75 TDC, 24 legal channels not read out 1 42 6 2.625, 36 (in the last TDC) 2 48 12 6 0 3 60 6 3.75 24 - " - - " - 4 72 12 9 0 5 84 6 5.25 72 - " - - " - 6 96 12 12 0 7 108 6 6.75 24 - " - - " - 8 120 12 15 0 Thus, a total of 66 TDCs is required, since the TDC readout is not extended across super layer boundries. 2. The "Number of SL Pointers" (see address INDDAT+0) is ten even though there are only 9 super layers. Block 10 is always empty. 3. Address of first word in TDC pointer block for super layer SLi: Address_SLi = CTC_BUF(3 + SLi) 4. Address of first wire hit datum in TDC Cj: Address_Cj = Address_SLi + CTC_BUF(Address_SLi + 1 + Cj) 5. Minimum bank length for no data = 12 CDF-152 Page 39 DETECTOR COMPONENT BANKS 7.5 CDTD Bank - Central Drift Tubes Detector Bank This bank contains raw drift tube data for all Central Drift Tubes. There are 3 planes of drift tubes, each plane has 672 wires. The detector surrounds the Central Tracking Chamber, and is segmented into 12 Sectors, each 30 degrees in azimuth. In 1986, wires are ganged and read out in pairs at the East end of the detector. The charge and time signals are read out using rabbit crates and the MX. For each drift tube (drift tube pair in 1986) there are 2 ADCs and 1 TDC. In the fully instrumented CDTD, each drift tube charge will be read out at East and West end. The CDTD bank header values are: Bank Name : "CDTD" Bank Number : 5 Bank Type : BNKTI2 (Integer*2) The CDTD bank format is: Displacement (I*2) Contents Description 0 6 No. of Blocks 1 P0 Pointer to Sector 0+1 2 P1 Pointer to Sector 2+3 3 P2 Pointer to Sector 4+5 4 P3 Pointer to Sector 6+7 5 P4 Pointer to Sector 8+9 6 P5 Pointer to Sector 10+11 7 P6 End of data pointer 8 data for Sector 0+1 ..... etc -------------------------------------------------------------- Data for Block 0, Sector 0+1 -------------------------------------------------------------- P0 Cluster Width/Start Channel layer 0, drift tube 0 P0+1 TDC data for layer 0,drift tube 0 . ADC0 data for layer 0,drift tube 0 . ADC1 data for layer 0,drift tube 0 . Cluster Width/Start Channel layer 1, drift tube 0 . TDC data for layer 1,drift tube 0 . ADC0 data for layer 1,drift tube 0 . ADC1 data for layer 1,drift tube 0 . Cluster Width/Start Channel layer 0, drift tube 1 . TDC data for layer 0,drift tube 1 . ADC0 data for layer 0,drift tube 1 . ADC1 data for layer 0,drift tube 1 . Cluster Width/Start Channel layer 2, drift tube 0 . TDC data for layer 2,drift tube 0 . ADC0 data for layer 2,drift tube 0 CDF-152 Page 40 DETECTOR COMPONENT BANKS . ADC1 data for layer 2,drift tube 0 . . . Cluster Width/Start Channel layer 0, drift tube 111 . TDC data for layer 0,drift tube 111 . ADC0 data for layer 0,drift tube 111 . ADC1 data for layer 0,drift tube 111 . Cluster Width/Start Channel layer 1, drift tube 111 . TDC data for layer 1,drift tube 111 . ADC0 data for layer 1,drift tube 111 . ADC1 data for layer 1,drift tube 111 . Cluster Width/Start Channel layer 2, drift tube 111 . TDC data for layer 2,drift tube 111 . ADC0 data for layer 2,drift tube 111 . ADC1 data for layer 2,drift tube 111 -------------------------------------------------------------- ______ Notes: 1. No of Blocks. Corresponds to the Sectors taken in pairs. 2. Block pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent pointers. For each block, the pointer Pi is .le. 8 + i*(4words/tube )*336 tubes/block when fully instrumented, or, in ganged scheme in 1986 Pi is .le. 8 + i*(4words/tube )*168 tube pairs/block. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last block. 4. Note: Drift tube 0 in each each layer is the drift tube with lowest phi (approximately = -15 deg) in the "3 o'clock" sector. The Data for each Block has the format:- Cluster Width/Start Channel 16 Bits Channel Contents 16 Bits ... Channel Contents 16 Bits ..... 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. The word is composed of CDF-152 Page 41 DETECTOR COMPONENT BANKS the following fields:- Bits Contents ---- -------- 0: 1 TDC=0,ADC0=1,ADC1=2 2:12 (Block(0:5) * 336 + Tube(0:111)*3+Plane(0:2) (0:2015) 13:15 Cluster Width (0:2 ==> 1:3) (Cluster width 0 corresponds to 1 data word) 2. Channel Contents. 16 bit ADC value (normalized to nanocoulombs). NB there is only one TDC per 2 ADC's. The 2 ADC's read out are : ADC 0 (lower phi in ganged scheme, East ADC in fully instrumented detector) ADC 1 (higher phi in ganged scheme, West ADC in fully instrumented detector) 3. Minimum bank length is 8 I*2 words. The maximum length corresponding to reading out all wires is 8072 I*2 words (4040 I*2 words in 1986). CDF-152 Page 42 DETECTOR COMPONENT BANKS 7.6 CEMD Bank - Central EM Calorimeter Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CEMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 43 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-9) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 44 DETECTOR COMPONENT BANKS 7.7 CSID Bank - Central 90 Degree Crack Filler Detector Bank ____ _______ Bank History 27-Dec-1987 MT Original creation The CSID bank header values are: Bank Name : "CSID" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) The CSID bank format is: Displacement (I*2) Contents Description 0 12 No. of Blocks 1 14 Modules 0- 1 Pointer .. ....... 12 Modules 22-23 Pointer 13 End of Data Pointer 14 Data for Modules 0-1 .. .... .. .... etc. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ...... Channel contents 16 bits CDF-152 Page 45 DETECTOR COMPONENT BANKS Notes: 1. Cluster Width/Start Channel: Bits Contents ---- -------- 0- 4 Azimuth Segmentation (0-23) 5- 8 Sub-azimuth Segmentation (0-14) 9-10 Depth segmentation (0-2) 11-12 Rapidity Segmentation (0-2) 13-15 Cluster Width (0-7) 2. Channel contents: 16 Bit ADC value. 3. No. of Blocks. Corresponds to the modules taken in pairs. 4. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 5. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 6. For the special case of the beamline tests, where only one or two modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). CDF-152 Page 46 DETECTOR COMPONENT BANKS 7.8 CESD Bank - Central EM Calorimeter Strips Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CESD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits .... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-6 Strip (0-127) or Wire (0-63) Number Bit 7 Strip (0) or Wire (1) CDF-152 Page 47 DETECTOR COMPONENT BANKS Bits 8-12 Module Number (0-23) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit value (normalised to nanoCoulombs). CDF-152 Page 48 DETECTOR COMPONENT BANKS 7.9 CCRD Bank - Central Crack Detector Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CCRD" Bank Number: 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 16 No. of blocks 1 10 West modules 0-5 pointer ...... 4 West modules 18-23 pointer 5 East modules 0-5 pointer ...... 8 East modules 18-23 pointer 9 End of data pointer 10 Data for west modules 0-5 ...... etc. 1. No. of blocks. Corresponds to the west modules and then the east modules taken in sixes (4 west, 4 east). 2. Block pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the bank data index. The word count for each block is determined by the difference between adjacent pointers. 3. End of data pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last block. The Data for each Block has the format:- Cluster width/start channel 16 bits Channel contents 16 bits .... Channel contents 16 bits 1. Cluster width/start channel. 16 bit word specifying the width of the cluster and the first channel identifier in the cluster. The word is composed of the following fields:- CDF-152 Page 49 DETECTOR COMPONENT BANKS Bits 0-3 Pad number (0-9) Bits 4-7 Unused Bits 8-12 Module number (0-23) Bits 13-15 Cluster width (0-7==>1-8) 2. Channel contents. 16 bit value appropriately normalized. NOTE: The crack chambers are read out three to a strip card, with strip cards in whatever slots are assigned in modules 1,4,7,10,13, 19, and 22, both west and east. CDF-152 Page 50 DETECTOR COMPONENT BANKS 7.10 PEMD Bank - Endplug EM Calorimeter Cathode Pad Bank This Bank has the following Bank Header Characteristics:- Bank Name : "PEMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-5 Pointer ...... 12 West Modules 66-71 Pointer 13 East Modules 0-5 Pointer ...... 24 East Modules 66-71 Pointer 25 End of Data Pointer 26 Data for West Modules 0-5 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in groups of 6 (30 deg in Azimuth). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word indicating the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-1 Depth Segmentation (0-2) Bits 2-5 Rapidity Segmentation (0-15) CDF-152 Page 51 DETECTOR COMPONENT BANKS Bits 6-12 Azimuth Segmentation (0-71) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value. CDF-152 Page 52 DETECTOR COMPONENT BANKS 7.11 PEAD Bank - Endplug EM Calorimeter Anode Bank This Bank has the following Bank Header Characteristics:- Bank Name : "PEAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the wire planes are read out in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-5 Layer (0-33) Bits 6-7 Quadrant (0-3) Bits 8-12 Unused CDF-152 Page 53 DETECTOR COMPONENT BANKS Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. CDF-152 Page 54 DETECTOR COMPONENT BANKS 7.12 PESD Bank - Endplug EM Calorimeter Strips Bank This Bank has the following Bank Header Characteristics:- Bank Name : "PESD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Sector 0 0-1 Pointer ...... 12 West Sector 11 Pointer 13 East Sector 0 Pointer ...... 24 East Sector 11 Pointer 25 End of Data Pointer 26 Data for West Sector 0 ...... etc. 1. No. of Blocks. Corresponds to the West Sectors and then the East Sectors (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits .... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-5 Strip Number (0-29 or 0-31) Bit 6 Phi (0) or Theta (1) Bits 7-10 Sector Number (0-11) CDF-152 Page 55 DETECTOR COMPONENT BANKS Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value. CDF-152 Page 56 DETECTOR COMPONENT BANKS 7.13 LUMD Bank - Instantaneous Luminosity Bank This bank has DVM information for the instantaneous luminosity signals from the beam-beam counters and luminosity telescopes. ____ _______ Bank History 16-Apr-92 MC Structure copied from BFLD This Bank has the following Bank Header Characteristics:- Bank Name : "LUMD" Bank Number : 1 Bank Type : BNKTR4 (REAL*4) The LUMD bank data format is: Displacement from data index Description ------------ ----------- 0 East*West BBC instantaneous luminosity (DVM Ch 0) 1 NE telescope instantaneous luminosity (DVM Ch 1) 2 SE telescope instantaneous luminosity (DVM Ch 2) 3 NW telescope instantaneous luminosity (DVM Ch 3) 4 SW telescope instantaneous luminosity (DVM Ch 4) 5 spare (DVM Ch 5) 6 spare (DVM Ch 6) 7 spare (DVM Ch 7) Notes: 1. Data is read from a Transiac scanning DVM (2032) in CAMAC crate #2 in RR33G. 2. This bank has no block pointers at the beginning, the first word pointed to by the data index is the East*West BBC instantaneous luminosity. CDF-152 Page 57 DETECTOR COMPONENT BANKS 7.14 FEMD Bank - Forward EM Calorimeter Cathode Pad Bank This Bank has the following Bank Header Characteristics:- Bank Name : "FEMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the first 4 correspond to the West Calorimeter taken in quadrants (90 degrees in Azimuth), the second 4 corresponding to the East Calorimeter taken in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 Depth Segmentation (0-1) CDF-152 Page 58 DETECTOR COMPONENT BANKS Bits 1-5 Rapidity Segmentation (0-19) Bits 6-12 Azimuth Segmentation (0-71) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. CDF-152 Page 59 DETECTOR COMPONENT BANKS 7.15 FEAD Bank - Forward EM Calorimeter Anode Bank This Bank has the following Bank Header Characteristics:- Bank Name : "FEAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the wire planes are read out in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-4 Layer (0-29) Bits 5-7 Region (0-4) Bits 8-9 Quadrant (0-3) CDF-152 Page 60 DETECTOR COMPONENT BANKS Bits 10-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. CDF-152 Page 61 DETECTOR COMPONENT BANKS 7.16 FHXD Bank - Forward Hadron Calorimeter Anode Bank This bank has data from forward hadron calorimeter anode wire planes. Bank History ____________ 12-Apr-1988 TK Original creation This Bank has the following Bank Header Characteristics:- Bank Name : "FHXD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the first 4 correspond to the West Calorimeter taken in quadrants (90 degrees in Azimuth), the second 4 corresponding to the East Calorimeter taken in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 62 DETECTOR COMPONENT BANKS Notes: 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-4 Layer (0-26) Bits 5-7 Region within Layer (0-4) Bits 8-9 Quadrant (0-3) Bits 10-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. CDF-152 Page 63 DETECTOR COMPONENT BANKS 7.17 CHAD Bank - Central Hadron Calorimeter ADC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CHAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 64 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-7) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 65 DETECTOR COMPONENT BANKS 7.18 CHTD Bank - Central Hadron Calorimeter TDC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CHTD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 66 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0-1 Not used (zero) Bits 2-5 Rapidity Segmentation (0-7) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit TDC value (normalised to ?????) N.B. There is only one TDC for each pair of Phototubes. CDF-152 Page 67 DETECTOR COMPONENT BANKS 7.19 WHAD Bank - Endwall Hadron Calorimeter ADC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "WHAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 68 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-5) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 69 DETECTOR COMPONENT BANKS 7.20 WHTD Bank - Endwall Hadron Calorimeter TDC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "WHTD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 70 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0-1 Not used (Zero) Bits 2-5 Rapidity Segmentation (0-5) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit TDC value (normalised to ?????) N.B. These is only one TDC for each pair of Phototubes CDF-152 Page 71 DETECTOR COMPONENT BANKS 7.21 PHAD Bank - Endplug Hadron Calorimeter Cathode Pad Bank This Bank has the following Bank Header Characteristics:- Bank Name : "PHAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-5 Pointer ...... 12 West Modules 66-71 Pointer 13 East Modules 0-5 Pointer ...... 24 East Modules 66-71 Pointer 25 End of Data Pointer 26 Data for West Modules 0-5 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-3 Rapidity Segmentation (0-11) Bits 4-10 Azimuth Segmentation (0-71) CDF-152 Page 72 DETECTOR COMPONENT BANKS Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 73 DETECTOR COMPONENT BANKS 7.22 PHWD Bank - Endplug Hadron Calorimeter Anode Bank This Bank has the following Bank Header Characteristics:- Bank Name : "PHWD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Module 0 Pointer ...... 12 West Module 11 Pointer 13 East Module 0 Pointer ...... 24 East Module 11 Pointer 25 End of Data Pointer 26 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 24 blocks; the wire planes are read out in 30 degree segments. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-4 Layer (0-19) Bits 5-8 Azimuthal segmentation (0-11) Bits 9-12 Unused CDF-152 Page 74 DETECTOR COMPONENT BANKS Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. CDF-152 Page 75 DETECTOR COMPONENT BANKS 7.23 FHAD Bank - Forward Hadron Calorimeter Cathode Pad Bank This Bank has the following Bank Header Characteristics:- Bank Name : "FHAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the first 4 correspond to the West Calorimeter taken in quadrants (90 degrees in Azimuth), the second 4 corresponding to the East Calorimeter taken in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bits 0-4 Rapidity Segmentation (0-19) CDF-152 Page 76 DETECTOR COMPONENT BANKS Bits 5-11 Azimuth Segmentation (0-71) Bit 12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 77 DETECTOR COMPONENT BANKS 7.24 FHWD Bank - Forward Hadron Calorimeter Anode Bank This Bank has the following Bank Header Characteristics:- Bank Name : "FHWD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 8 No. of Blocks 1 10 West Quadrant 0 Pointer ...... 4 West Quadrant 3 Pointer 5 East Quadrant 0 Pointer ...... 8 East Quadrant 3 Pointer 9 End of Data Pointer 10 Data for West Quadrant 0 ...... etc. 1. No. of Blocks. There are 8 blocks; the first 4 correspond to the West Calorimeter taken in quadrants (90 degrees in Azimuth), the second 4 corresponding to the East Calorimeter taken in quadrants. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- CDF-152 Page 78 DETECTOR COMPONENT BANKS Bits 0-4 Layer (0-26) *** see notes below *** Bits 5-7 Region within Layer (0-5) *** see notes below *** Bits 8-9 Quadrant (0-3) Bits 10-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value representing charge deposited. 3. For the Jan-March 1987 run, the six regions within a layer are OR-ed in groups of three, resulting in two big regions. In other words, the anode wire planes are divided in two, being region 1 the nearer and region 2 the farther from the z-y plane. 4. For Jan-March 1987, data are organized as follows for the Cluster width/Start channel word: Top quadrants (covering the angle phi between 0 and 180 degrees): Bits 0-4 = 0 layer 0 region 1 = 1 layer 0 region 2 = 2 layer 2 region 1 = 3 layer 2 region 2 = 4 layer 4 region 1 not used in West side phi=0-90 = 5 layer 4 region 2 not used in West side phi=0-90 = 6 layer 6 region 1 etc... =26 layer 26 region 1 not used in W/E side phi=90-180 =27 layer 26 region 2 not used in W/E side phi=90-180 Bits 5-7 not used Bits 8-15 as described above. Bottom quadrants (covering the angle phi between 180 and 360 degrees) are organized as follows: Bits 0-4 = 0 layer 1 region 1 = 1 layer 1 region 2 = 2 layer 3 region 1 = 3 layer 3 region 2 = 4 layer 5 region 1 = 5 layer 5 region 2 = 6 layer 7 region 1 etc... =24 layer 25 region 1 =25 layer 25 region 2 Bits 5-7 not used Bits 8-15 as described above. CDF-152 Page 79 DETECTOR COMPONENT BANKS 7.25 CMUD Bank - Central Muon Detector Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CMUD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- ******************************************************** * * * The Assignment of the Bit Fields in the * * Channel ID was changed 20-May-85 to * * accomodate 4 ADCs per TDC. This change * * has not yet been made to Monte Carlo * * or Testbeam generated data. (31 May 1985) * * * ******************************************************** Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-5 Pointer ...... 12 West Modules 66-71 Pointer 13 East Modules 0-5 Pointer ...... 24 East Modules 66-71 Pointer 25 End of Data Pointer 26 Data for West Modules 0-5 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of CDF-152 Page 80 DETECTOR COMPONENT BANKS data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0-1 ADC or TDC Number (0-3) Bit 2 TDC (0) or ADC (1) Bits 3-5 Wire Number (0-5) Bits 6-7 Plane Number (0-3) Bits 8-12 Azimuth Segmentation (0-23) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). N.B. There is only one TDC for each quartet of ADCs. CDF-152 Page 81 DETECTOR COMPONENT BANKS 7.26 TCMD Bank - Trigger Central Muon Matchbox Detector Bank This bank has data from the MU2T, CTCx and Cluster Bus components of the Central Muon Level 2 Trigger System. The CTCx is a FASTBUS module which receives the output from the Central Tracking Fast Processor. CTCx maps the CTC track information into expected phi sector of the calorimeter (0:23) for all stiff tracks, and into expected phi sector of the CMUD (0:71) in order that they be tested for muon candidates. The outputs of this module are entered into the cluster bus directly, for all stiff tracks, and are entered into MU2T modules to search for muon candidates. The inputs to this module are entered into its DATA0 FIFO register. The MU2Ts are 24 FASTBUS modules which perform trigger logic on the inputs from CMUD triggers and predicted CMUD hits as entered from CTCx. Each MU2T has inputs from one CMUD phi sector (0:23) containing 6 cells (0:5) in both West (WHIT0:5) and East (EHIT0:5), as well as 2 ORs of West and East hits (WHITOR, EHITOR). The expected CMUD hits passed from CTCx have phi coverage corresponding to 2 CMUD cells, so that there are 3 of them per MU2T (PHIXX0:2). The logic of the MU2T: WGOLD = (WHIT5+WHIT4)*PHIXX2 + (WHIT3+WHIT2)*PHIXX1 + (WHIT1+WHIT0)*PHIXX0 EGOLD = (EHIT0+EHIT1)*PHIXX2 + (EHIT2+EHIT3)*PHIXX1 + (EHIT4+EHIT5)*PHIXX0. Both input from the CMUD and the output of the trigger logic are in Data register of the MU2T. Note that MU2T has no NTA. The Cluster Bus receives inputs from CTCx and MU2T corresponding to stiff tracks and stiff tracks confirmed as Golden Muon candidates, respectively. The phi segmentation of the inputs is 15 degrees, corresponding to the the Central Calorimeter segmentation. The Cluster Bus collects information on the phi-eta distribution of the tracks and stores it in 24 phi x 42 eta array. For each track, the Cluster Bus stores its stiffness code (charge and 3 bit transverse momentum code), as well as the stiff track and/or Golden Muon bit. There are 6 Cluster Bus boards with 2 to 4 words read out from each. CDF-152 Page 82 DETECTOR COMPONENT BANKS The TCMD bank header values are: Bank Name : "TCMD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TCMD bank format is: Displacement (I*4) Contents Description 0 3 No. of Blocks 1 P0 Pointer to block 0, 24 MU2T cards, Data reg 2 P1 Pointer to block 1, CTCx FIFO content 3 P2 Pointer to block 2, Cluster Bus data 4 End of Data Pointer -------------------------------------------------------------- Data for Block 0, MU2T (0:23), Data Reg -------------------------------------------------------------- P0 MU2T wedge 0 P0+1 MU2T wedge 1 . . P0+23 MU2T wedge 23 -------------------------------------------------------------- Data for Block 1, CTC Data Reg 0 = FIFO -------------------------------------------------------------- P1 CTC input from Fast track proc word 0 P1+1 CTC input from Fast track proc word 1 . . . . . . . . -------------------------------------------------------------- Data for Block 2, Cluster Bus Interface Cards -------------------------------------------------------------- P2 Cluster Bus word 0 P2+1 Cluster Bus word 1 . . . . . . P2+59 Cluster Bus word 59 -------------------------------------------------------------- CDF-152 Page 83 DETECTOR COMPONENT BANKS ______ Notes: ____ ___ _____ __ ____ _______ ____ ________ 1. Data for Block 0, MU2T (0:23), Data Register MU2T Wedge 0 FASTBUS Data register 0 32 bits ..... ..... MU2T Wedge 23 FASTBUS Data register 0 32 bits ____ ___ _____ __ ____ _______ ____ ___ _ 2. Data for Block 1, CTCx FASTBUS Data Reg 0 CTC encoded track address # 0 CTC encoded track address # 1 32 bits CTC encoded track address # 2 32 bits CTC encoded track address # 3 32 bits .... .... ____ ___ _____ __ _______ ___ 3. Data for Block 2, Cluster Bus There are 12 I*4 words of data from each of 5 modules. Cluster Bus Word 0 32 bits Cluster Bus word 1 32 bits ... Cluster Bus word 59 32 bits 4. Block 0, MU2T - bit field definition: Bits Contents ---- -------- 00-lsb status of WHIT0 input from chambers 01 status of WHIT1 input from chambers 02 status of WHIT2 input from chambers 03 status of WHIT3 input from chambers 04 status of WHIT4 input from chambers 05 status of WHIT5 input from chambers 06 status of WHITOR input from chambers 07 status of WGOLD output of trigger logic 08 status of EHIT0 input from chambers 09 status of EHIT1 input from chambers 10 status of EHIT2 input from chambers 11 status of EHIT3 input from chambers 12 status of EHIT4 input from chambers 13 status of EHIT5 input from chambers 14 status of EHITOR input from chambers 15 status of EGOLD output of trigger logic 16 status of ENBEHIT enables EHITOR as part of MUONOR 17 status of ENBWHIT enables WHITOR as part of MUONOR 18 status of ENBEGOLD enables EGOLD as part of GOLDOR CDF-152 Page 84 DETECTOR COMPONENT BANKS 19 status of ENBWGOLD enables WGOLD as part of GOLDOR 20 status of SEL0MUX \ 21 status of SEL1MUX \ selects ECL output to 22 status of SEL2MUX / P4 cable 23 status of ENBMUX~ / (see table below) 24 status of ENETA17 \ 25 status of ENETA18 \ 26 status of ENETA19 \ 27 status of ENETA20 \ test bits for CDFCB board 28 status of ENETA21 / enabled by TESTENB in CSR0 29 status of ENETA22 / otherwise ETA17-20 = WGOLD 30 status of ENETA23 / and ETA21-24 = EGOLD 31-msb status of ENETA24 / 5. Block 1, CTCx FIFO - bit field definition Bits Contents ---- -------- 0:02 Stiffness Code ( 0: 7) 3:03 Muon Sign Code ( 0: 1) 0=Mu+; 1=Mu- 4:10 CTC Wire in TDC( 0:95) 11:14 CTC TDC ( 1:15) 15:15 not used ( 0: 0) 16:25 Eta code (not used yet) 26:29 Stereo Code (not used yet) 6. Block 2, Cluster Bus - bit field definition Bits Contents ---- -------- 0:23 Wedge information (1 bit per wedge) 24:24 0 25:29 Eta information 30:31 Phi information 7. Minimum (Maximum) bank length = 41(565) I*4 words. CDF-152 Page 85 DETECTOR COMPONENT BANKS 7.27 FMUD Bank - Forward Muon Wire Detector Bank This bank contains raw wire data for all Forward Muon chambers. For each end (east, west) of the detector there is a Forward Muon toroid pair with three planes of chambers (0-2). Each plane is segmented in wedges which are 15 degrees in azimuth and contain 96 wire channels and 15 pads. The wires are wire or'd over 45 degrees in azimuth (octants) giving 4608 total wire channels and 2160 pads. For each end there are two scintillator planes segmented in 15 degree wedges for a total of 96 paddles. Wire signals are digitized in FASTBUS by PSL TDC's and scintillator signals are latched in FB. The FB TDC's and latches are read by SSP modules which produce detector banks in I*4 formats typical of SSP detector components. The pad signals are digitized in RABBIT and read by MX scanners which produce data in a separate detector bank with I*2 format. The format of FMUD is similar to VTWD and CTCD. Wire data in FMUD begins with a list of octant pointers for West followed by East ends of the detector. Blocks of data for each octant begin with the number of planes in the block (=3) and a list of pointers to the first hit in each plane. There are two 32-bit words per hit. The maximum number of words read out per plane (each TDC) is 256, 32 words from each of 8 RAMS. Normally, fewer than this will be read out from each RAM starting with a pair of words (called marker words because the clock counter is zeroed at the start pulse and this pair of words is entered into the RAMS to mark the start of data from this crossing) which have zeroes everywhere except in the wire set bits and the RAM number bits. If more than 16 hits are recorded in a RAM, this pair of words may be overwritten. The last pair of words to appear in a RAM will always be the same, however. They will look like the marker word pair except that the most significant half-word will contain the final clock count (both words). Only RAMS for which hits have been recorded since the start pulse will be read out. The FMUD bank header values are: Bank Name : "FMUD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) CDF-152 Page 86 DETECTOR COMPONENT BANKS The FMUD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 16 Number of blocks (= 8 octants * 2 ends) 1 S0 Pointer to octant 0 (W end, 0-45 degrees) 2 S1 Pointer to octant 1 (W end, 45-90 degrees) . . . . 9 S8 Pointer to octant 0 (E end, 0-45 degrees) . . . . 16 S15 Pointer to octant 7 (E end, 315-360 degrees) 17 S16 Pointer to end of data + 1 ---------------------------------------------------------- Block for octant 0 (W end) ---------------------------------------------------------- S0 3 No. of planes S0+1 P000 Pointer to plane 0, octant 0 S0+2 P001 Pointer to plane 1, octant 0 S0+3 P002 Pointer to plane 2, octant 0 S0+4 P003 Pointer to end of 0th octant + 1 S0+P000 TDC data for plane 0 of octant 0 S0+P000+1 TDC data for plane 0 of octant 0 . . . . S0+P001 TDC data for plane 1 of octant 0 S0+P001+1 TDC data for plane 1 of octant 0 . . . . S0+P003-1 Last data word for octant 0 ---------------------------------------------------------- Block for octant 1 (W end) ---------------------------------------------------------- S1 3 No. of planes S1+1 P010 Pointer to plane 0 of octant 1 . . . . S1+P010 TDC data for plane 0 of octant 1 . . . . . . . . S16-1 Last data word ---------------------------------------------------------- CDF-152 Page 87 DETECTOR COMPONENT BANKS Notes: 1. Octant pointers are displacements relative to INDDAT. 2. End of Data Pointer. Specifies displacement to the next I*4 word past the end of the data. Used to calculate the word count for the last octant block. 3. The number of words in octant block N is equal to the difference between octant pointers to block N+1 and block N. This word count includes the number of planes and plane pointer words if they are present. If octant N is declared "off-line" in the constants list, no plane pointer words will be entered in the data bank. In this case the number of words in octant block N will be 0. If octant N is declared "on-line" but no TDC hits were registered, the plane pointer words will be entered and the number of words in octant block N will be 5. The octant pointer words should always be checked first to determine if there are any data. 4. Each Plane Pointer word has the following format: Bits 0:15 = pointer, Bits 16:31 = plane word count. Plane pointers are displacements relative to the 1st word (No. of planes) in each octant block. The number of words for each plane within an octant can be calculated from the difference between the plane pointers. 5. Each pair of 32 bit TDC data words stores a single TDC hit in the following format: ______ WORD 1 ____ ________ Bits Contents 0:15 Contents of tapped delay line (16 ns total with 1ns taps) 16:31 Clock Counter (10ns/count from clock start=0) ______ WORD 2 ____ ________ Bits Contents 0:11 Set Wire Register (0=not set,1=set for each of 12 wires) 12:15 TDC RAM Number (8 per TDC each with 12 wires, numbered 0-7) 16:31 Same as Word 1 CDF-152 Page 88 DETECTOR COMPONENT BANKS 6. Octant and plane numbers can be determined by using the pointers and counting down from INDDAT. The naming convention for octant pointers is S0-S7 for West toroids and S8-S15 for East toroids in the above format description. 7. Minimum bank length is 18 I*4 words. The maximum length is set by the SSP buffer size. 8. Hit pairs are ordered by time first-in first-out within each of the 8 TDC RAM's. 9. Each PSL TDC has 96 inputs which correspond to the 96 drift chamber wires. Wires 0-55 are the coordinate plane wires, which are closer to the IP than wires 56-95, the ambiguity plane wires. The wire number assignment is not the same as the RAM and wire number but can be obtained from these by means of a lookup table. CDF-152 Page 89 DETECTOR COMPONENT BANKS 7.28 FMCD Bank - Forward Muon Counter Detector Bank This bank contains latch data words from forward muon counter and trigger control latches. The FMCD bank header values are: Bank Name : "FMCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The FMCD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 2 Number of blocks 1 4 Pointer to block 0 2 12 Pointer to block 1 3 22 End of data pointer 4 West front scint bits 0-31 5 West front scint bits 32-62 6 West rear scint bits 0-31 7 West rear scint bits 32-62 8 West front+rear bits 63-71 each 9 Special scintillator tiles: 18 bits 10 Z West SINPAD + PUB control 11 Z ADC bits to Pucker (16 bits) 12 East front scint bits 0-31 13 East front scint bits 32-62 14 East rear scint bits 0-31 15 East rear scint bits 32-62 16 East front+rear bits 63-71 each 17 0 Empty 18 Pucker trigger + Pucker 300% 19 SINPAD trigger (16 bits) 20 East Sinpad + Pucker control 21 Z Pucker test (16 bits) FMCD block format: Each block contains the data for one side, East or West. Each contains pairs of I*4 words of data for a 64 bit Struck Latch. The first word is the lower 32 latch bits. The second word is the upper 32 latch bits. The first 6 words are the scintillator bits for that side. The remaining 2 or 4 words are trigger control and/or trigger output bits. CDF-152 Page 90 DETECTOR COMPONENT BANKS Notes: 1. Our trigger requires a pair of scintillator hits, a tower in matching inductive pads, and a wire trigger road; which may be 1-3-3 (300%), 1-1-1 (100%), or half cell 1-1-1 (50%). 2. We have 72 scintillators in two planes on each side, numbered consecutively in phi from 0 to 71. The bits for scintillators 0-62 fit neatly into one latch, and the leftover 9 bits are stuck into another latch. The leftover 9 bits from the front plane is in the low 16 bits of the first word, and the leftoever 9 bits from the rear plane is in the high 16 bits of the first word. 3. The West latch bits are in proper order. However, the East bits are shuffled somewhat to accomodate the trigger electronics. Their bits are numbered as follows: Bit 0 = Phi 2 Bit 1 = Phi 1 Bit 2 = Phi 0 Bit 3 = Phi 5 Bit 4 = Phi 4 Bit 5 = Phi 3 Bit 6 = Phi 8 . . . . Bit 70 = Phi 70 Bit 71 = Phi 69 4. Words with contents marked `Z' above should be 0 in normal running. 5. Latches used for controlling various aspects of our trigger are called `Output' latches (`Output of the computer controls the trigger'), and those used for displaying event-by-event trigger information are called `Input' latches (`Input to the computer as data'). 6. We also have 18 test scintillators in 3 planes, covering 5 degrees, and segmented in eta. Their bits are in word 9. Each NUPU tests for the presence of trigger roads in one of our 16 octants, and forwards this information to the Pucker module. Each of the SINPADS tests for the presence of a scintillator pair hit and a pad tower (from the PPU boards in the collision hall) in the same 5 degree phi region in that side of the detector. This information CDF-152 Page 91 DETECTOR COMPONENT BANKS is forwarded to the Pucker, which makes the final trigger. The SINPAD's record their preliminary trigger bits in the East Input Latch. The Pucker records the final trigger bits in the same latch. Description of Recorded Bits in East Input Latch ---------------------------------------------------------------------- Function Latch bit Data word bit Pucker Trigger bits (final trigger) Not used 1 0 1 West Muon 50% 2 1 1 West Muon 100% 3 2 1 West Muon 300% 4 3 2 West Mu 300% Same oct 5 4 1 East Muon 50% 6 5 1 East Muon 100% 7 6 1 East Muon 300% 8 7 2 East Mu 300% Same oct 9 8 2 West Mu diff oct 10 9 2 East Mu diff oct 11 10 1 East + 1 West muon 12 11 1 West Muon (any) 13 12 1 East Muon (any) 14 13 1 Muon trigger (any) 15 14 2 Muon Trigger (any) 16 15 Pucker 1-muon 300% Trigger bits (wire road) West octant 0 17 16 East octant 0 18 17 West octant 1 19 18 East octant 1 20 19 West octant 2 21 20 East octant 2 22 21 West octant 3 23 22 East octant 3 24 23 West octant 4 25 24 East octant 4 26 25 West octant 5 27 26 East octant 5 28 27 West octant 6 29 28 East octant 6 30 29 West octant 7 31 30 East octant 7 32 31 SINPAD Trigger bits (match of scintillator and pad in phi) West SINPAD oct 0 33 0 West SINPAD oct 1 34 1 West SINPAD oct 2 35 2 West SINPAD oct 3 36 3 West SINPAD oct 4 37 4 West SINPAD oct 5 38 5 West SINPAD oct 6 39 6 West SINPAD oct 7 40 7 CDF-152 Page 92 DETECTOR COMPONENT BANKS East SINPAD oct 0 41 8 East SINPAD oct 1 42 9 East SINPAD oct 2 43 10 East SINPAD oct 3 44 11 East SINPAD oct 4 45 12 East SINPAD oct 5 46 13 East SINPAD oct 6 47 14 East SINPAD oct 7 48 15 In the East Output latch low word, in the upper half, are the bits which control our Pucker, which is the overall trigger control module for the Forward Muons system. Pucker Control bits Bit # Meaning 16 West 1-muon select bit 0 17 West 1-muon select bit 1 (see note A) 18 West 2-muon select bit 0 19 West 2-muon select bit 1 (see note A) 20 East 1-muon select bit 0 21 East 1-muon select bit 1 (see note A) 22 East 2-muon select bit 0 23 East 2-muon select bit 1 (see note A) 24 West+East 2-muon select bit 0 25 West+East 2-muon select bit 1 26 West+East 2-muon select bit 2 27 West+East 2-muon select bit 3 (see note B) 28 Force counters for West NUPU 29 Force counters for East NUPU (see note C) 30 Enable halo counter veto (obsolete) 31 Disable 2-muon from same NUPU (see note D) A) Two select bits are used to describe the type of trigger road allowed. If this is for 2 muons on the same side, both are required to satisfy the same road. 0 = 300% 1 = 100% 2 = 50% 3 = disable B) Two muons on different sides use 4 select bits to determine the type of trigger road each must satisfy. Bit 0 West muon select bit 0 Bit 1 West muon select bit 1 (see note A) Bit 2 East muon select bit 0 Bit 3 East muon select bit 1 (see note A) C) It is possible to override the requirement for scintillation counters by using the forcing bits. CDF-152 Page 93 DETECTOR COMPONENT BANKS D) Another variety of two muon trigger is the OR of all the same-NUPU 2-muon signals, which use a 300% road. This can be disabled if the rate is too high. PAGE 7.29 FMSD Bank - Forward Muon Strip Detector Bank This bank has forward muon strip data which is also called "Pad" data in the muon toroid terminology. The FMSD bank header values are: Bank Name : "FMSD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) The FMSD bank format is: Displacement (I*2) Contents Description 0 8 No. of Blocks 1 P00 Pointer to block 0, W. end, 0- 90 degrees 2 P01 Pointer to block 1, W. end, 90-180 degrees . . . 5 P10 Pointer to block 0, E. end, 0- 90 degrees . . . 8 P13 Pointer to block 3, E. end, 270-360 degrees 9 End of Data Pointer -------------------------------------------------------------- Data for Block 0, West End -------------------------------------------------------------- P00 Cluster width/Start channel P00+1 ADC Data word . . . . -------------------------------------------------------------- Data for Block 1, West End -------------------------------------------------------------- P01 Cluster width/Start channel P01+1 ADC Data word . . . . . . etc. CDF-152 Page 94 DETECTOR COMPONENT BANKS The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 95 DETECTOR COMPONENT BANKS Notes: 1. Block pointers give displacements relative to INDAT. 2. Cluster Width/Start Channel is a 16-bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- ____ ________ Bits Contents 0:01 Plane (2 bits, 0-1) 2:04 Radius (3 bits, 0-4) 5:11 Azimuth (7 bits, 0-71) 12:12 End (West=0, East=1) 13:15 Cluster width 3. Channel contents = 16-bit ADC value (normalized to nanoCoulombs). Analog information may be used to distinguish multihits from multipulses. 4. Minimum bank length is 10 I*2 words. CDF-152 Page 96 DETECTOR COMPONENT BANKS 7.30 FMTD Bank - Forward Muon Timing Detector Bank This bank has two additional PSL TDC's for the forward muon readout system. These TDC's can be used to more precisely measure the scintillation counter hit times. In addition, these TDC's are used to record the time of the STOP signal from the Model B Gate Selector to fix the phases of the clock signals from the two PSL clock cards which drive the wire signal TDC's. This Bank has the following Bank Header Characteristics:- Bank Name : "FMTD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The FMTD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 2 Number of blocks 1 P0(=4) Pointer to block 0, West counter times 2 P1(=260) Pointer to block 1, East counter times 3 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, West counter times -------------------------------------------------------------- P0 First data word - West TDC . . . . P0+255 Last data word - West TDC -------------------------------------------------------------- Data for Block 1, East counter times -------------------------------------------------------------- P1 First data word - East TDC . . . . P1+255 Last data word - East TDC -------------------------------------------------------------- CDF-152 Page 97 DETECTOR COMPONENT BANKS Notes: 1. Block 0 = West counter times and West clock card phase. 2. Block 1 = East counter times and East clock card phase. 3. The data format corresponds to a dump of the TDC RAM's. There are 256 words of data space for each card corresponding to 8 TDC's per card with 32 words per TDC. Each TDC services 12 channels of frontend data. The first unit's data is in data space 0-1F, the second from 20-3F, etc. 4. Data word format is defined for each pair of 32-bit words. Even addresses (0,2,4,...): Bits Contents ---- -------- 0-11 Bit pattern for hit channels - hits are indicated by logic zero. 12-14 TDC unit (0-7) 16-27 Hit time in units of 10 ns 28-31 not used. Odd addresses (1,3,5,...) Bits Contents ---- -------- 0-15 'Tap' bits holding 1 ns time information 16-27 Hit time in units of 10 ns (same as above) 28-31 not used 5. The first word pair for each TDC is the clock shutoff time and should be the same for all TDC's common to a clock distribution module. 6. For any group of counters, the azimuth increases with TDC channel and alternates between front and rear. For example, the first 12 channels are F0,R0,F1,R1,F2,R2,F3,R3, F4,R4,F5,R5 where 'F' and 'R' denote front plane and rear plane respectively and the number denotes the azimuth (0-23). CDF-152 Page 98 DETECTOR COMPONENT BANKS 7. Forward muon timing signals: TDC channel Counter Azimuth (0-95) (0-23) ------------------------------- 16-27 0-5 32-43 6-11 48-59 12-17 64-75 18-23 ------------------------------- 80 STOP signal ------------------------------- other unused ------------------------------- Only 49 of the 96 channels are dedicated. 8. This bank format resembles but is not the same as the format in which the wire data TDC's are currently read out. Differences are: i) Only hit RAMS are read out for wires. ii) The data is ordered by increasing time, starting with the marker word pair if it is present(i.e., has not been overwritten), otherwise the full 32 words from the RAM. For the new bank, data is reverse time ordered and the whole RAM is always read out. iii) The wire number and tap time words are also reversed so the odd and even words don't mean the same thing for wires as they do for scintillator. CDF-152 Page 99 DETECTOR COMPONENT BANKS 7.31 BBCD Bank - Beam Beam Counters Raw Data Bank This bank contains the raw data for all beam beam counters. The BBCD bank header values are: Bank Name : "BBCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) ****************************************** * * * The Format of this Bank was changed on * * 12-Aug-1985 from I*2 to I*4 in order * * to reflect change in readout from MX * * to SSP. * * * ****************************************** The BBCD bank format is: Displacement (I*4) Contents Description 0 2 Number of data blocks 1 4 ADC Data Block pointer 2 68 TDC Data Block Pointer 3 132 End of Data Pointer 4 ADC data West ADC Tube 0A . . . . 67 ADC data East ADC Tube 15B 68 TDC data West TDC Tube 0A . . . . 131 TDC data East TDC Tube 15B 1. No. of Blocks. Corresponds to the ADCs and the the TDCs. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. CDF-152 Page 100 DETECTOR COMPONENT BANKS 4. More TDCs may be added for the stop and chamber stops. CDF-152 Page 101 DETECTOR COMPONENT BANKS 7.32 BBLD Bank - Beam Beam Counters Latch Data Bank This bank contains the raw data for 1 Struck 64-channel latch. This Bank has the following Bank Header Characteristics:- Bank Name : "BBLD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 1 No. of Blocks 1 3 1st Latch Block Pointer 2 5 End of Data Pointer 3 BBC Latch (see notes) 4 BBC Latch (see notes) 1. No. of Blocks. There is 1 Block, corresponding to the 1 Latch Module. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers (being set to 2 for this bank). 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. This Bank is fixed length. 5. The BBC Latch is organised in the following manner:- Bits 0-15 : West Halo 0-15 Bits 16-31 : East Halo 0-15 Bits 32-47 : West 0-15 Bits 48-63 : East 0-15 CDF-152 Page 102 DETECTOR COMPONENT BANKS 7.33 CSXD Bank - Raw Data Bank For The Scintillators Of The Central Muon Extension This bank has TDC data for the scintillators of the Central Muon Extension. The CSX Detector Bank format for raw TDC data is similar to that of the CMX (Central Muon Extension), CMP (Central Muon Upgrade), CTC, and VTX. These detector banks all contain TDC hits from LRS 1879 TDCs read out by SSPs. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each region. There are 4 such pointers. Each of the 4 360 degree arc-sections (AS) is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. Here, the term "pointer" is an offset from the start of the current block rather than an absolute address. All data are packed in I*4 words. This Bank has the following Bank Header Characteristics. Bank Name : "CSXD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CSXD bank format is as follows. _______ ________ Address Contents ________________________ INDDAT+0 | Number of pointers | Block A +1 | PAS# = pointers to | . | each arc | Arc Section pointer . | | block +5 | Pointer - end of data| ________________________ PAS0 | Number of TDCs | Block B0 PAS0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for Arc Section ________________________ PAS0 + PC0 | Data for TDC 0 | Block B1 . | " | Data for Arc Section 0 PAS0 + PCN | Data for TDC N | . | " | ________________________ PAS1 | Number of TDCs | TDC pointer block . | PC# = TDC Pointers | for Arc Section 1 ________________________ | | . | Data | CDF-152 Page 103 DETECTOR COMPONENT BANKS . | | _____ __ ___ _______ _______ _____ Block A: Arc Section Pointer Block ____ ________ Word Contents 0 NAS = # of Arc Sections (4) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NAS-1 = pointer to end of YBOS bank + 1 for i = NAS _____ ______ ___ _______ _________ ___ ___ _______ _ Block B0(i): TDC pointer sub-block for Arc Section i ____ ________ Word Contents 0 NTDC(i) = number of TDCs in Arc Section i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) It is permissable, if the entire arc section is empty of data, that the block B0(i) be omitted entirely. The section pointer in block A MUST be present in all cases, though it may just indicate a missing arc section by its pointer offset value. In blocks pertaining to sections with data, each TDC has an entry in this pointer block even if there are no hit data. Entries in these TDC pointer blocks are defined as follows. bits 0-15 pointer to start of hit data for TDC j 16-31 available bits, potentially available to flag detected corrupt or incomplete data Bit 30 is set when the TDC is not fully read out. (this condition arises when the are too many hits in this TDC. If this is so, various wire/hit limits are invoked, and not all data present are read out, in order to avoid overflowing buffer size limits) CDF-152 Page 104 DETECTOR COMPONENT BANKS _____ ________ ___ ____ _________ ___ ___ _______ __ ___ Block B1(i,j): Hit data sub-block for Arc Section i, TDC _ j TDC data have the following format. bits 0- 9 T = Leading edge TDC count. (10 bits; bit 0 is the "phase" bit) 10-18 L = Width of the pulse in counts. (9 bits, aligned with bits 1-9) 19-25 C = Channel number within this TDC. (0:95 are "legal" channels) 27-29 E = Error word = 1 Pulse structure error 2 Unused channel 3 Illegal channel (>95) 4 Miscellaneous 30 N = Flag bit, indicating that the data on this wire were not completely read out. N=1 flags this.) 31 S = Stop bit = 1 for last hit on this wire. Only channels with hit data appear in these blocks. The 96 channels 0:95 are potentially legal channels. The scintillator arcs are read out in increasing azimuth. The lowest numbered channel on each side is at an azimuth of -45 degrees. The 4 blocks of CSX data correspond to the detector sections described below. ________ __________________ Detector Number of Channels Location Used Unused Arc Section 0 WEST Inner 73 None Arc Section 1 WEST Outer 73 None Arc Section 2 EAST Inner 69 35-38 Arc Section 3 EAST Outer 69 35-38 -------------------------------------------- Total number of channels 284 8 In the 1992 run configuration, the signals of every section, after being discriminated, go in one TDC which is fully contained in a single "block". There exists the possibility that the read out produces a different number of leading and trailing edge digitizations. In this case, by convention, the SSP fills in a "0" for a missing trailing edge associated to a leading edge, and a "511" for a leading edge that is missing the corresponding trailing edge. CDF-152 Page 105 DETECTOR COMPONENT BANKS ______ Notes: 1. Each arc section must be read out within an integral number of TDC modules, thus 1 TDC per section is required. There are 23 unused channels for both regions on the west side and 23+4 unused channels for both regions on the east side. 2. The regions begin at CDF phi of -45 degrees on the west side of the detector and increase in phi. They continue beginning at phi of -45 degrees on the east side and increase in phi. For the first part of 1992 run, there will be no scintillators on the floor (225-315 degrees). Due to the solenoid chimney, four counters in both regions of the east side are missing (75-105 degrees) in the 1992 run. 3. A total of 4 TDC modules are required for 1992 run. 4. The "Number of AS Pointers" (see address INDDAT+0) is 4. CDF-152 Page 106 DETECTOR COMPONENT BANKS 7.34 CXRD Bank - Central Muon Extension Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the Central Muon Extension. ____ _______ Bank History 21-Jun-1991 PS Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "CXRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CXRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 8 Number of blocks (quarter sections(QS)) 1 P0 Pointer to block 0, data for QS 0 2 P1 Pointer to block 1, data for QS 1 . . . . . . . . 8 P7 Pointer to block 7, data for QS 7 9 P8 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (QS 0) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in QS 0 P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block -------------------------------------------------------------- Data for Block 1, (QS 1) -------------------------------------------------------------- P1 NTDC2 Number of TDCs x 2 in QS 1 P1+1 TL0 Pointer to leading edge data from TDC 0 P1+2 TT0 Pointer to trailing edge data from TDC 0 P1+3 TL1 Pointer to leading edge data from TDC 1 P1+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P1+NTDC2+1 Pointer to first word of next block . . etc. CDF-152 Page 107 DETECTOR COMPONENT BANKS The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... ______ Notes: 1. With the exception of the number of blocks of data and the number of TDCs associated with each block, CMX TDC data is the same as that of the CMP, CTC, and VTX. 2. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 3. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (4 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 4. All quartersections contain 3 TDCs for a total of 24 TDCs 5. CMX reformatted TDC data is saved in bank CMXD. 6. Minimum bank length = 74 I*4 words. CDF-152 Page 108 DETECTOR COMPONENT BANKS 7.35 CURD Bank - Central Muon Upgrade Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the Central Muon Upgrade chambers. ____ _______ Bank History 21-Jun-1991 PS Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "CURD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CURD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 4 Number of blocks (regions (RS)) 1 P0 Pointer to block 0, data for RS 0 2 P1 Pointer to block 1, data for RS 1 3 P2 Pointer to block 2, data for RS 2 4 P3 Pointer to block 3, data for RS 3 5 P4 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (RS 0) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in RS 0 P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block -------------------------------------------------------------- Data for Block 1, (RS 1) -------------------------------------------------------------- P1 NTDC2 Number of TDCs x 2 in RS 1 P1+1 TL0 Pointer to leading edge data from TDC 0 P1+2 TT0 Pointer to trailing edge data from TDC 0 P1+3 TL1 Pointer to leading edge data from TDC 1 P1+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P1+NTDC2+1 Pointer to first word of next block . . etc. CDF-152 Page 109 DETECTOR COMPONENT BANKS The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... ______ Notes: 1. With the exception of the number of blocks of data and the number of TDCs associated with each block, CMP TDC data is the same as that of the CMX, CTC, and VTX. 2. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 3. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (4 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 4. Regions 0, 2 and 3 contain 3 TDCs; region 1 has 4. The total number of TDCs is 13. 5. CMP reformatted TDC data is saved in bank CMPD. 6. Minimum bank length = 40 I*4 words. CDF-152 Page 110 DETECTOR COMPONENT BANKS 7.36 CSRD Bank - Central Muon Extension Scintillators Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the Central Muon Extension scintillators. ____ _______ Bank History 21-Jun-1991 PS Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "CSRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CSRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 9 Number of blocks (superlayers (SL)) 1 P0 Pointer to block 0, data for SL 0 2 P1 Pointer to block 1, data for SL 1 3 P2 Pointer to block 2, data for SL 2 4 P3 Pointer to block 3, data for SL 3 5 P4 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (SL 0) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in SL 0 P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block -------------------------------------------------------------- Data for Block 1, (SL 1) -------------------------------------------------------------- P1 NTDC2 Number of TDCs x 2 in SL 1 P1+1 TL0 Pointer to leading edge data from TDC 0 P1+2 TT0 Pointer to trailing edge data from TDC 0 P1+3 TL1 Pointer to leading edge data from TDC 1 P1+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P1+NTDC2+1 Pointer to first word of next block . . etc. CDF-152 Page 111 DETECTOR COMPONENT BANKS The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... ______ Notes: 1. With the exception of the number of blocks of data and the number of TDCs associated with each block, CSX TDC data is the same as that of the CMP, CMX, CTC, and VTX. 2. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 3. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (4 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 4. All superlayers contain 1 TDC for a total of 4 TDCs 5. CSX reformatted TDC data is saved in bank CSXD. 6. Minimum bank length = 22 I*4 words. CDF-152 Page 112 DETECTOR COMPONENT BANKS 7.37 SCLD Bank - Scaler Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "SCLD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 16 No. of Scalers 1 P0(=19) CFRED STATS - Scaler Pointer 2 P1 CFRED TRIGS - Scaler Pointer 3 P2 BBC LUMIN - Scaler Pointer 4 P3 . . - Scaler Pointer 5 P4 . . - Scaler Pointer 6 P5 . . - Scaler Pointer 7 P6 . . - Scaler Pointer 8 P7 . . - Scaler Pointer 9 P8 BBC RINGS - Scaler Pointer 10 P9 LUMINOSITY - Scaler Pointer 11 P10 INHIBITS/BC - Scaler Pointer 12 P11 CMU #1 - Scaler Pointer 13 P12 CMU #2 - Scaler Pointer 14 P13 CDT #1 - Scaler Pointer 15 P14 CDT #2 - Scaler Pointer 16 P15 LEVEL 2 - Scaler Pointer 17 P16 Not yet documented 18 End of Data Pointer 19 Data for 1st Scaler .... etc. 1. This Bank has a fixed format whereby each Block contains the 32 datawords for the appropriate Struck scaler. 2. For the September 1985 Run there were 4 scalers; the first 2 for the "Run Gate" and the second 2 for the "Live Time Gate". These are described in TGN-29, "Scalers for the September Run". 3. This bank began in January 1987 with 4 trigger scalers, increased to 8 scalers early in March and increased to 10 scalers near the end of March. It was changed to 14 scalers at the start of the 1988 run and increased to 15 scalers in August, 1988. CDF-152 Page 113 DETECTOR COMPONENT BANKS 4. Scalers 1-8 were originally described in Trigger Note 57. Scalers for the 1988 run are described in note TGN 67. 5. The 16 scalers read out for the run starting in 1992 are two CDF FRED scalers, six luminosity scalers, one BBC scaler, one telescope scaler, one inhibits and BC scaler, two CMU scalers, two CDT scalers and one Level 2 scaler. SCLD Blk Scaler GATE Description ======== ====== ==== ========================= 0 1 RUN CDF FRED STATS 1 2 RUN CDF FRED Level 1 2-7 3-8 LIVE BBC Luminosity 8 9 LIVE BBC Rings 9 10 LIVE LUMINOSITY 10 11 LIVE INHIBITS AND BC 11-12 12-13 CMU - Central Muon 13-14 14-15 CDT - Central Drift Tubes 15 16 Level 2 6. CFRED STATS = CDF FRED L1/L2 Statistics with most signals gated by GLIVE: Channel 0-7 not used Channel 8 # L1 queries Channel 9 # L1 acknowledges Channel 10 # Event scans Channel 11 # Events accepetd by Level 2 Channel 12 # Events rejected by Level 2 Channel 13-15 not used Channel 16-19 L1 Calorimetry triggers (Summer A,B,C,D) Channel 20 BBC west Channel 21 BBC east Channel 22 CMU Level 1 Channel 23 FMU Level 1 Channel 24 CFT Level 1 trigger Channel 25 CFT Level 1 low Channel 26 CMU Dimuon Channel 27 Forward Si Level 1 Channel 28 Beam crossing from Master Clock Channel 29-31 not used 7. CFRED TRIGS = CDF FRED Level 1 scaler: Channel 0-15 CDF FRED L1 after rate limiting Channel 16-31 CDF FRED L1 before rate limiting CDF-152 Page 114 DETECTOR COMPONENT BANKS 8. BBC LUMIN = BBC Live scalers for 6 bunches: Channel Description ======= =========== 0 Beam crossing from Master Clock 1 OR of BBC West 2 OR of BBC East 3 OR of BBC West Halo 4 OR of BBC East Halo 5 East AND West 6 East AND West with no halo hits 7 BBC West > N hits 8 BBC East > M hits 9 BBC (W > N) AND (E > M) 10 BBC "Lost Proton" 11 BBC "Lost PBAR" 12-15 spare 16 NE Coincidence A*B*C 17 NE Coincidence A*B*C*(BBC West) 18 SE Coincidence A*B*C 19 SE Coincidence A*B*C*(BBC West) 20 NW Coincidence A*B*C 21 NW Coincidence A*B*C*(BBC East) 22 SW Coincidence A*B*C 23 SW Coincidence A*B*C*(BBC East) 24-31 spare 9. BBC RINGS = BBC sum of rings: Channel Description ======= =========== 0-3 West rings 1-4 4-7 West North, Top, South, Bottom 8-11 East rings 1-4 12-15 East North, Top, South, Bottom 16-19 West Halo rings 1-4 20-23 West Halo North, Top, South, Bottom 24-27 East Halo rings 1-4 28-31 East Halo North, Top, South, Bottom 10. LUMINOSITY = Telescope Live scalers: Channel Description ======= =========== 0-5 North East A, B, C, A*B, B*C, A*C 6-11 South East A, B, C, A*B, B*C, A*C 12-17 North West A, B, C, A*B, B*C, A*C 18-23 South West A, B, C, A*B, B*C, A*C 24-25 North East A*B*C, A*B*C*(BBC West) 26-27 South East A*B*C, A*B*C*(BBC West) 28-29 North West A*B*C, A*B*C*(BBC East) 30-31 South West A*B*C, A*B*C*(BBC East) CDF-152 Page 115 DETECTOR COMPONENT BANKS 11. Inhibits and BC = Inhibits and Beam Crossing scaler: Channel Description ======= =========== 0 OR of all HV inhibits dot Beam Cross 1 MR veto counters dot Beam Cross 2 Beam Crossings 12. CMU 1 = Central Muon No.1 scaler: Channel Description ======= =========== 0 Wedge 0, East 1 Wedge 0, West 2 Wedge 1, East 3 Wedge 1, West 4-15 Wedges 2-7 (East, West) 16 spare 17 OR of brass muons 18 spare 19 ? 20 spare 21 OR of gold muons 22-23 spare 24 60 Hz clock 25 Two brass muons 26 spare 27 Clear and Strobe 28 ? 29 Two gold muons 30-31 spare 13. CMU 2 = Central Muon No.2 scaler: Channel Description ======= =========== 0 Wedge 8, East 1 Wedge 8, West 2 Wedge 9, East 3 Wedge 9, West 4-31 Wedges 10-23 (East, West) 14. LEVEL 2 scaler is Level 2 triggers with channel number defined as the Level 2 trigger number in the trigger table and trigger mask. CDF-152 Page 116 DETECTOR COMPONENT BANKS 7.38 LATD Bank - Misc Latch, ADC And TDC Detector Bank This bank has miscellaneous Latch, ADC and TDC data. ____ _______ Bank History 18-Aug-88 JP Add Camac 24 bit latch and inhibit mask. This Bank has the following Bank Header Characteristics:- Bank Name : "LATD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The LATD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 3 Number of blocks 1 P0 Pointer to block 0, Latch data 2 P1 Pointer to block 1, ADC data 3 P2 Pointer to block 2, TDC data 4 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Miscellaneous Latch data -------------------------------------------------------------- P0 Main Ring energy in 2.697 MeV units P0+1 Main Ring intensity P0+2 Time in MR supercycle (1/360 sec) P0+3 Time in MR cycle P0+4 not used P0+5 not used P0+6 24 bit CAMAC latch P0+7 Inhibit status P0+8 Inhibit enable mask -------------------------------------------------------------- Data for Block 1, Miscellaneous ADC data -------------------------------------------------------------- P1 -------------------------------------------------------------- Data for Block 2, Miscellaneous TDC data -------------------------------------------------------------- P2 CDF-152 Page 117 DETECTOR COMPONENT BANKS ______ Notes: 1. CAMAC 24 bit latch: Bits Contents ---- -------- 00 Main Ring east counter 01 Main Ring west counter 02 unused 03 unused 04 Macro blanking 05 Micro blanking 06 Injection blanking 07 Coalescing blanking 08 Extraction blanking 09-12 unused 13 29 cycle 14 2A cycle 15 2B cycle 16 2D cycle 17 2E cycle 18-23 unused 2. Trigger inhibit inputs: Bits Contents ---- -------- 00 VTPC fast trip 01 CTC fast trip 02 FTC fast trip 03 CES fast trip 04 CDT fast trip 05 CMU fast trip 06 Plug fast trip 07 unused 08 Forward fast trip 09 unused 10 FMU fast trip 11 unused 12 Main Ring blanking 13-15 unused 3. The trigger inhibit enable mask indicates which of the inhibit conditions are enabled. If an enable bit is 1, AND the MRINHIBIT Level 0 trigger is specified in the trigger table, then presence of the corresponding input will inhibit triggers. Bit assignments for the "trigger inhibit input" and "trigger inhibit enable" words are identical. CDF-152 Page 118 DETECTOR COMPONENT BANKS 7.39 TL2D Bank - Level 2 Trigger Detector Bank, 1992 Version This bank contains the raw event-by-event data from the Level 2 trigger. Data come from the following boards in the Level 2 processor crate: 1. Level 2 Cluster Memory boards (contain the cluster list) 2. Level 2 Mercury Boards (the fast decision boards) 3. Level 2 Jupiter Modules (the sequencer and processor) 4. Level 2 Nemesis Boards (Neural Net, PEM Spike Killer, CES/CPR Trigger) The Level 2 Cluster Memory boards hold the list of clusters sent by the Listmaker and the list of muons and/or stiff tracks from the muon Match Box. The format is given below. Note that the number of clusters and hence the length of this block is variable, and MUST be determined from the pointers. The Level 2 Mercury boards make a fast decision based on a simple counting of event attributes (jets, electrons, muons, total ET, etc.) from the cluster list above as the list is read into the Cluster Memory modules. The format for the Mercury registers is given below: new Mercury modules can and will be added to the list, and so the format will grow. The Level 2 Jupiter modules consist of a sequencer which controls the data flow in the Level 2 processor, and a processor module which makes and holds the decisions. Jupiter compares the number of jets, electrons, etc. to preloaded numbers and issues a L2 accept or reject to FRED. Bank History ____________ 14-Aug-1986 HJF Original Creation (3 Mercury modules only) 22-Oct-1986 HJF Add Mercury 4, Jupiter 25-Oct-1986 HJF Myron's and Mel's comments and corrections 29-Oct-1986 HJF Terry Carroll's comments:reorder blocks 29-Aug-1988 JH Add blocks 10, 11 and 12. 29-Dec-1992 WFB Update for 1992 The TL2D bank header values are: Bank Name : "TL2D" Bank Number : 1 Hardware (Real Event) Bank Number : 2 Simulation Bank Number : 3 Reconstructed from TCSD,1 Bank Number : 4 De-compressed from TL2Q Bank Type : BNKTI4 (Integer*4) CDF-152 Page 119 DETECTOR COMPONENT BANKS The TL2D bank format is: Displacement (I*4) Contents Description ____________________________________________________________________________ 0 26 No. of Blocks 1 P0 Pointer to block 0, NCLUST from Timing Control 2 P1 Pointer to block 1, Cluster Memory Board 0 3 P2 Pointer to block 2, Cluster Memory Board 1 4 P3 Pointer to block 3, Cluster Memory Board 2 6 P4 Pointer to block 4, Level 2 Summary Block 5 P5 Pointer to block 5, Jupiter Prcssor User Registers 7 P6 Pointer to block 6, Mercury_ET1 (ET and Jet ET) 8 P7 Pointer to block 7, Mercury_ELP1 (Plug Elec/Photons) 9 P8 Pointer to block 8, Mercury_MUC1 (Cent Muons/miss ET) 10 P9 Pointer to block 9, Mercury_L1 11 P10 Pointer to block 10, Mercury_L1X 12 P11 Pointer to block 11, Mercury_ELC1 (Central Elec/Phot) 13 P12 Pointer to block 12, Mercury_TAU (Tau-like Jets) 14 P13 Pointer to block 13, Mercury_ET2 (2nd Mercury-ET) 15 P14 Pointer to block 14, Mercury_MUC2 (2nd Mercurt-MUC) 16 P15 Pointer to block 15, Nemesis_Level-1 17 P16 Pointer to block 16, Nemesis_PEM-Spike-Killer 18 P17 Pointer to block 17, Nemesis_Neural-Net-Result 19 P18 Pointer to block 18, Nemesis_Neural-Net-Seed 20 P19 Pointer to block 19, Mercury_ELF1 (Pass 1 FEM El/Ph) 21 P20 Pointer to block 20, Mercury_ELC2 (Pass 2 CEM El/Ph) 22 P21 Pointer to block 21, Mercury_ELC3 (Pass 3 CEM El/Ph) 23 P22 Pointer to block 22, Mercury_ELP2 (Pass 2 PEM El/Ph) 24 P23 Pointer to block 23, Mercury_ELP3 (Pass 3 PEM El/Ph) 25 P24 Pointer to block 24, Mercury_ELF2 (Pass 2 FEM El/Ph) 26 P25 Pointer to block 25, Mercury_ELF3 (Pass 3 FEM El/Ph) 27 P26 Pointer to block 26, Nemesis-CES/CPR 28 End of Data Pointer -------------------------------------------------------------- Data for Block 0, Level 2 Status Block -------------------------------------------------------------- P0 Number of Decision Pass Clusters (Clusters used in making the Level 2 Decision) P0+1 Cluster Finder Analog Noise Flag, Decision Pass (bit <0>) If on, analog noise detected and TL2D may be corrupted P0+2 Cluster Finder Analog Noise Flag, Repeat Pass (bit <0>) If on, analog noise detected and TL2D may be corrupted P0+3 Number of Decision + Repeat Pass Cluster (Repeat Clusters are performed after a Level 2 Accept and are used to fill the Level 2 Section of TBMD; Not filled in simulation.) NB: The two cluster counters determine which clusters in the cluster list (Blocks 1,2,3) are "decision" clusters and which are "repeat" clusters. In the description below, N=Decision+Repeat Clusters (P0+3) CDF-152 Page 120 DETECTOR COMPONENT BANKS ("Repeat" Clusters are not simulated by TrigSim, nor are they retained in the TL2Q or TL2D,4 banks.) -------------------------------------------------------------- Data for Block 1, Cluster Memory Board 0 EM ET (64-bit word 0) -------------------------------------------------------------- P1 Cluster 0,Wd0[31:0] Cluster 0, Word 0, bits 0-31 P1+1 Cluster 1,Wd0[31:0] Cluster 1, Word 0, bits 0-31 P1+2 Cluster 2,Wd0[31:0] Cluster 2, Word 0, bits 0-31 . . . . P1+N-1 Cluster N-1,Wd0[31:0] Cluster NCLUST-1, Word 0, bits 0-31 P1+N Cluster 0,Wd0[63:32] Cluster 0, Word 0, bits 32-63 P1+N+1 Cluster 1,Wd0[63:32] Cluster 1, Word 0, bits 32-63 P1+N+2 Cluster 2,Wd0[63:32] Cluster 2, Word 0, bits 32-63 . . . . P1+2N-1 Cluster N-1,Wd0[63:32] Cluster NCLUST-1, Word 0, bits 32-63 -------------------------------------------------------------- Data for Block 2, Cluster Memory Board 1 Total =EM + Had ET ( 64-bit word 1) -------------------------------------------------------------- P2 Cluster 0,Wd1[31:0] Cluster 0, Word 1, bits 0-31 P2+1 Cluster 1,Wd1[31:0] Cluster 1, Word 1, bits 0-31 P2+2 Cluster 2,Wd1[31:0] Cluster 2, Word 1, bits 0-31 . . . . P2+N-1 Cluster N-1,Wd1[31:0] Cluster NCLUST-1, Word 1, bits 0-31 P2+N Cluster 0,Wd1[63:32] Cluster 0, Word 1, bits 32-63 P2+N+1 Cluster 1,Wd1[63:32] Cluster 1, Word 1, bits 32-63 P2+N+2 Cluster 2,Wd1[63:32] Cluster 2, Word 1, bits 32-63 . . . . P2+2N-1 Cluster N-1,Wd1[63:32] Cluster NCLUST-1, Word 1, bits 32-63 The format of the Word 0 (EM) and Word 1 (TOT) blocks above are: Bits Length(bits) Quantity Description Units ==== ============ ======== =========== ===== (9:0) 10 ET Transverse Energy 0.5 GeV/ct (19:10) 10 ETsinphi y component of ET 0.5 GeV/ct (29:20) 10 ETcosphi x component of ET 0.5 GeV/ct (31:30) 2 spare 2-bits extra ---- (39:32) 8 Mean rapidity 0.0330/ct (47:40) 8 sigma-y Width in rapidity 0.0250/ct (54:48) 7 Mean phi 0.0491/ct CDF-152 Page 121 DETECTOR COMPONENT BANKS (55) 1 spare spare ---- (63:56) 8 sigma-phi Width in phi 0.0250/ct -------------------------------------------------------------- Data for Block 3, Cluster Memory Board 2 PT bits, etc. (64-bit word 2) -------------------------------------------------------------- P3 Cluster 0,Wd2[31:0] Cluster 0, Word 2, bits 0-31 P3+1 Cluster 1,Wd2[31:0] Cluster 1, Word 2, bits 0-31 P3+2 Cluster 2,Wd2[31:0] Cluster 2, Word 2, bits 0-31 . . . . P3+N-1 Cluster N-1,Wd2[31:0] Cluster NCLUST-1, Word 2, bits 0-31 P3+N Cluster 0,Wd2[63:32] Cluster 0, Word 2, bits 32-63 P3+N+1 Cluster 1,Wd2[63:32] Cluster 1, Word 2, bits 32-63 P3+N+2 Cluster 2,Wd2[63:32] Cluster 2, Word 2, bits 32-63 . . . . P3+2N-1 Cluster N-1,Wd2[63:32] Cluster NCLUST-1, Word 2, bits 32-63 The format of the Word 2 block above is: Bits Length(bits) Quantity Description ==== ============ ======== ============== (3:0) 4 Origin code 1 = Jet Clusters 2 = Sum-Et Cluster 3 = Muon Cluster (CMU or CMX) 4 = Stiff Track (Repeat Pass Only) 5 = EM Clusters, Pass #1 6 = EM Clusters, Pass #2 7 = EM Clusters, Pass #3 8-15 = Currently Undefined (11:4) 8 N # of towers in cluster (17:12) 6 YSEED Y of seed tower in cluster (22:18) 5 PHISEED Phi of seed tower in cluster (Seed not valid for Sum-ET Clusters) (23) 1 Stifftrack bit 1=stiff track present (27:24) 4 PT sign+ 3-bit PT of track (Stiff Track bit and PT valid only for Muon,Stiff Track, and EM Clusters) (28) 1 CMX Muon CMX Muon Cluster Flag (29) 1 CMU/CMP Muon CMU/CMP Muon Cluster Flag Muon flags only valid for Muon Clusters (Cluster Origin Code = 3) (31:30) 2 spare spare bits (63:32) 32 spare spare bits CDF-152 Page 122 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 4, Level 2 Summary Block -------------------------------------------------------------- P4 Level 2 Processing Timeout Counter P4+1 Level 2 Cluster Finder Analog Noise Error Counter P4+2 L2 Processor #1 Trigger Mask, Triggers 0-31 P4+3 L2 Processor #1 Trigger Mask, Triggers 32-63 P4+4 L2 Processor #2 Trigger Mask, Triggers 0-31 P4+5 L2 Processor #2 Trigger Mask, Triggers 32-63 P4+6 Number of Level 2 Triggers N (from Physics Table) P4+7 Prescale factor for Trigger 1 (from Physics Table) . . . . . . . . . . . . . . P4+6+N Prescale factor for Trigger N (from Physics Table) P4+7+N Number of events passing Trigger 1 output from prescale . . . . . . . . . . . . . . P4+6+2N Number of events passing Trigger N output from prescale P4+7+2N Remainder of Trigger 1 input to prescale . . . . . . . . . . . . . . P4+6+3N Remainder of Trigger N input to prescale P4+7+3N Count of Trigger 1 before prescale . . . . . . . . . . . . . . P4+6+4N Count of Trigger N before prescale NB: For 1992, the Remainder starts at the prescale value and counts down to zero. (Opposite of 1988-89 scheme.) NB: The Level 2 Trigger Mask is the bit _OR_ of the Trigger Masks from the two Level 2 Processors. The Level 2 TAGC is then created by taking the resulting mask and ORing the triggers >= 42 into a single bit. -------------------------------------------------------------- Data for Block 5, Jupiter Processor user registers -------------------------------------------------------------- P5 Processor User Defined Register 0, L2 Processor #1 P5+1 Processor User Defined Register 1, L2 Processor #1 . . . . . . P5+15 Processor User Defined Register 15, L2 Processor #1 P5+16 Processor User Defined Register 0, L2 Processor #2 P5+17 Processor User Defined Register 1, L2 Processor #2 . . . . . . P5+31 Processor User Defined Register 15, L2 Processor #2 NB: These are registers used in the Level 2 Processors for internal purposes. They are for hardware diagnostic purposes only. -------------------------------------------------------------- Data for Block 6, Mercury_ET1 Module Jets, Em-jets, total ET, and cluster ET CDF-152 Page 123 DETECTOR COMPONENT BANKS -------------------------------------------------------------- NB: Had*1992 means that Hadronic Energy was included in that quantity for the 1992 run. (And not for earlier runs) P6 Merc_ET1, D0(31:0) Mercury_ET1,Data register 0 (31:0) P6+1 Merc_ET1, D0(63:32) Mercury_ET1,Data register 0 (63:32) P6+2 Merc_ET1, D1(9:0) Highest cluster ET(EM+Had) P6+3 Merc_ET1, D2(9:0) Next-highest cluster ET(EM+Had) P6+4 Merc_ET1, D3(9:0) Highest cluster ET(EM+Had*1992) P6+5 Merc_ET1, D4(9:0) Next-highest cluster ET(EM+Had*1992) P6+6 Merc_ET1, D5(9:0) Index of highest cluster ET(EM+Had) P6+7 Merc_ET1, D6(9:0) Index of Next " " " P6+8 Merc_ET1, D7(9:0) Index of highest cluster ET(EM+Had) P6+9 Merc_ET1, D8(9:0) Index of Next " " " P6+10 Merc_ET1, D9(11:0) Sum of cluster ET(EM+Had) P6+11 Merc_ET1, D10(11:0) Sum of cluster ET(EM) P6+12 Merc_ET1, D11(9:0) Total ET(EM+Had) P6+13 Merc_ET1, D12(9:0) Total ET(EM+Had*1992) where the format of the zeroth word (Mercury data register 0 bits (31:0)) is: Bits Length(bits) Description ==== ============ =========== (3:0) 4 # of clusters with ET(EM+Had)>Merc_ET1 register 16 (7:4) 4 # of clusters with ET(EM+Had)>Merc_ET1 register 17 (11:8) 4 # of clusters with ET(EM+Had)>Merc_ET1 register 18 (15:12) 4 # of clusters with ET(EM+Had*1992)>Merc_ET1 register 24 (19:16) 4 # of clusters with ET(EM)>Merc_ET1 register 25 (23:20) 4 # of clusters with ET(EM+Had*1992)>Merc_ET1 register 26 (24) 1 Sum of cluster ET(EM+Had)>Merc_ET1 register 19 (25) 1 Sum of cluster ET(EM+Had)>Merc_ET1 register 20 (26) 1 Sum of cluster ET(EM+Had*1992)>Merc_ET1 register 27 (27) 1 Sum of cluster ET(EM+Had*1992)>Merc_ET1 register 28 (28) 1 Total (Sum-ET)ET(EM+Had)>Merc_ET1 register 21 (29) 1 Total (Sum-ET)ET(EM+Had)>Merc_ET1 register 22 (30) 1 Total (Sum-ET)ET(EM+Had)>Merc_ET1 register 23 (31) 1 Total (Sum-ET)ET(EM+Had*1992)>Merc_ET1 register 29 and the format of the first word (Mercury data register 0 bits (63:32)) is: (0) 1 Total (Sum-ET)ET(EM+Had*1992)>Merc_ET1 register 30 (1) 1 Total (Sum-ET)ET(EM+Had*1992)>Merc_ET1 register 31 -------------------------------------------------------------- Data for Block 7, Mercury_ELP1 Module Plug Electrons and Photons (No Tracking) -------------------------------------------------------------- P7 Merc_ELP1, D0(19:0) Mercury_ELP1,Data register 0 (19:0) P7+1 Merc_ELP1, D1(9:0) Highest ET(EM) Electron/Photon P7+2 Merc_ELP1, D2(9:0) Index of highest ET(EM) el/phot P7+3 Merc_ELP1, D3(9:0) Highest ET(EM) Electron/Photon P7+4 Merc_ELP1, D4(9:0) Index of highest ET(EM) el/phot CDF-152 Page 124 DETECTOR COMPONENT BANKS NB: CFT Tracking does not extend well into the PEM, so Level 2 CFT Track Matching is disabled for all thresholds in the Mercury-Plug Boards. NB: ELP1 looks at clusters only from the first EM Calorimetry Cluster Finding pass (Cluster Code #5) where the format of the zeroth word (Mercury_ELP1 data register 0 bits (19:0)) Bits Length(bits) Description ==== ============ =========== <3:0> 4 # of PEM electron/photons; ET(EM)>=Reg. #16 <7:4> 4 # of PEM electron/photons; ET(EM)>=Reg. #17 <11:8> 4 # of PEM electron/photons; ET(EM)>=Reg. #18 and |PT|>=Reg. #21 (disabled) <15:12> 4 # of PEM electron/photons; ET(EM)>=Reg. #19 and |PT|>=Reg. #22 (disabled) <19:16> 4 # of PEM electron/photons; ET(EM)>=Reg. #20 and |PT|>=Reg. #23 (disabled) -------------------------------------------------------------- Data for Block 8, Mercury_MUC1 Module Central Muons, CMU/CMP and CMX; and Misssing ET -------------------------------------------------------------- P8 Merc_MUC1, D0(18:0) Mercury_MUC1,Data register 0 (18:0) P8+1 Merc_MUC1, D1(2:0) |PT| of highest |PT| CMX muon P8+2 Merc_MUC1, D2(9:0) Index of highest |PT| CMX muon P8+3 Merc_MUC1, D3(2:0) |PT| of highest |PT| CMU/CMP muon P8+4 Merc_MUC1, D4(9:0) Index of highest |PT| CMU/CMP muon P8+5 Merc_MUC1, D5(16:0) Missing ET-squared(EM+Had) (GeV**2) From the Sum-ET Cluster P8+6 Merc_MUC1, D6(9:0) Index to Sum-ET Cluster P8+7 Merc_MUC1, D7(3:0) # of Jet clusters (Code 1) P8+8 Merc_MUC1, D8(3:0) # of Sum-ET (Code 2) P8+9 Merc_MUC1, D9(3:0) # of Muon Clusters (CMX+CMU) (Code 3) P8+10 Merc_MUC1, D9(3:0) # of Stiff Track Clusters (Code 4) P8+11 Merc_MUC1, D9(3:0) # of EM Pass 1 Clusters (Code 5) P8+12 Merc_MUC1, D9(3:0) # of EM Pass 2 Clusters (Code 6) P8+13 Merc_MUC1, D9(3:0) # of EM Pass 3 Clusters (Code 7) P8+14 Merc_MUC1, D9(3:0) # of Cluster Code 8 (currently undef) P8+15 Merc_MUC1, D9(3:0) # of Cluster Code 9 (currently undef) P8+16 Merc_MUC1, D9(3:0) # of Cluster Code 10 (currently undef) P8+17 Merc_MUC1, D9(3:0) # of Cluster Code 11 (currently undef) P8+18 Merc_MUC1, D9(3:0) # of Cluster Code 12 (currently undef) P8+19 Merc_MUC1, D9(3:0) # of Cluster Code 13 (currently undef) P8+20 Merc_MUC1, D9(3:0) # of Cluster Code 14 (currently undef) P8+21 Merc_MUC1, D9(3:0) # of Cluster Code 15 (currently undef) where the format of the zeroth word (Mercury_MUC1 data register 0 bits (18:0))is: Bits Length(bits) Description ==== ============ =========== CDF-152 Page 125 DETECTOR COMPONENT BANKS <3:0> 4 # of CMX muons; |PT|>=Reg. #17,ET(TOT)<>Reg16 <7:4> 4 # of CMX muons; |PT|>=Reg. #18,ET(TOT)<>Reg16 <11:8> 4 # of CMU/CMP muons; |PT|>=Reg. #20,ET(TOT)<>Reg19 <15:12> 4 # of CMU/CMP muons; |PT|>=Reg. #21,ET(TOT)<>Reg19 <16> 1 ET2(EM+Had)>=Reg. #22 <17> 1 ET2(EM+Had)>=Reg. #23 <18> 1 ET2(EM+Had)>=Reg. #24 NB: For 1992, the polarity of the ET cut can be switched. It is defined in the trigger table. NB: Earlier than 1992, the CMX triggers slots were reserved for FMU Level 2 Triggers (FMU Level 2 never implemented). NB: The Mercury-MUC1 board accepts clusters from cluster code #3 It uses the CMU/CMP and CMX Muon Cluster Flags (see cluster description) to determine whether the Muon Cluster is located in the CMX or CMU/CMP regions. It is possible to have a muon cluster spread between both regions; in this case it will be counted as both a CMX and a CMU/CMP muon cluster by the Mercury Module. -------------------------------------------------------------- Data for Block 9, Mercury_L1 registers -------------------------------------------------------------- P9 'Latch' bits for the 12 Level 1 triggers (Input Spigots) Not used in 1992. -------------------------------------------------------------- Data for Block 10, Mercury_L1X registers -------------------------------------------------------------- P10 'Latch' bits for the 16 Level 1 triggers (Triggers Out) Not used in 1992. -------------------------------------------------------------- Data for Block 11, Mercury_ELC1 registers EM Pass #1, Central Electrons/Photons -------------------------------------------------------------- P11 Merc_ELC1, D0(19:0) Mercury_ELC1,Data register 0 (19:0) P11+1 Merc_ELC1, D1(9:0) Highest ET(EM) Central "Photon" P11+2 Merc_ELC1, D2(9:0) Index of highest ET(EM) Central "Photon" P11+3 Merc_ELC1, D3(9:0) Highest ET(EM) Central "Electron" P11+4 Merc_ELC1, D4(9:0) Index, highest ET(EM) Central "Electron" NB: The distinction between "Electrons" and "Photons" is that a Level 2 CFT Track is required to match for "Electrons", but not for "Photons". Therefore, there may be some overlap between the two types of objects. CDF-152 Page 126 DETECTOR COMPONENT BANKS NB: ELC1 looks at clusters only from the first EM Calorimetry Cluster Finding pass (Cluster Code #5) Bits Length(bits) Description ==== ============ =========== <3:0> 4 # of Central electron/photons; ET(EM)>=Reg. #16 <7:4> 4 # of Central electron/photons; ET(EM)>=Reg. #17 <11:8> 4 # of Central electrons;ET(EM)>=Reg. #18 and |PT|>=Reg. #21 (From CFT Match) <15:12> 4 # of Central electrons; ET(EM)>=Reg #19 and |PT|>=Reg. #22 (From CFT Match) <19:16> 4 # of Central electrons; ET(EM)>=Reg #20 and |PT|>=Reg. #23 (From CFT Match) -------------------------------------------------------------- Data for Block 12, Mercury_TAU registers -------------------------------------------------------------- P12 Merc_TAU, D0(19:0) Mercury_TAU,Data register 0 (19:0) P12+1 Merc_TAU, D1(9:0) Highest el/phot ET(EM) P12+2 Merc_TAU, D2(9:0) Index of highest ET(EM) el/phot P12+3 Merc_TAU, D3(9:0) Highest central el ET(EM) P12+4 Merc_TAU, D4(9:0) Index of highest ET(EM) central el NB: For 1992, no CFT Track Matching is required for Tau Jet Clusters. The Mercury-Tau accepts Jet clusters from Cluster Code 1 The registers are basically identical to Mercury_ELP1 in block 7 The format of the zeroth word (Mercury_TAU data register 0 bits (19:0)) is: Bits Length(bits) Name Description ==== ============ ==== =========== <3:0> 4 # of Tau Jets, ET(EM)>=Reg. #16 <7:4> 4 # of Tau Jets, ET(EM)>=Reg. #17 <11:8> 4 # of Tau Jets, ET(EM)>=Reg. #18 and |PT|>=Reg. #21 (disabled) <15:12> 4 # of Tau Jets ET(EM)>=Reg #19 and |PT|>=Reg. #22 (disabled) <19:16> 4 # of Tau Jets, ET(EM)>=Reg #20 and |PT|>=Reg. #23 (disabled) -------------------------------------------------------------- Data for Block 13, Mercury_ET2 Module Jets, Em-jets, total ET, and cluster ET -------------------------------------------------------------- P6...P6+13 Identical to Mercury-ET1 Module Used for extra ET thresholds. -------------------------------------------------------------- CDF-152 Page 127 DETECTOR COMPONENT BANKS Data for Block 14, Mercury_MUC2 Module Central Muons, CMU/CMP and CMX; and Misssing ET -------------------------------------------------------------- P14...P14+21 Identical to Block 8, Mercury-MUC1 Used for extra muon thresholds. -------------------------------------------------------------- Data for Block 15, Nemesis-Level_1 Registers -------------------------------------------------------------- P15 <11:0> Level 1 CDF Fred Input Spigots (See Hardware Facts table for specification) <31:16> Level 1 CDF Fred Triggers (Outputs) (Copy of Level 1 Trigger Mask) P15+1 <15:13> FMU Level 1 Trigger Threshold bits <15> 12.0 GeV <14> 7.5 GeV <13> 4.5 GeV (Not yet verified) -------------------------------------------------------------- Data for Block 16, Nemesis-PEM Spike Killer -------------------------------------------------------------- P16 <31:0> PEM Anode Sections over threshold <15:0> West PEM <3:0> Quadrant 3 <7:4> Quadrant 2 <11:8> Quadrant 1 <15:12> Quadrant 0 <31:16> East PEM <19:16> Quadrant 7 <23:20> Quadrant 6 <27:24> Quadrant 5 <31:28> Quadrant 4 (See PEM Spike Killer Documentation for more information.) P16+1 Not used, 1992 (Future CES/CPR Latch) -------------------------------------------------------------- Data for Block 17, Nemesis-Neural-Net-Results -------------------------------------------------------------- P17 <15:0> Neural Net CEM Isolation, Board #1 Result <11:0> Digitized Neuron Output <15:12> Comparator Bits (not enabled) <14> Processing Done bit <31:16> Neural Net CEM Isolation, Board #2 Result <27:16> Digitized Neuron Output <31:28> Comparator Bits (not enabled) <30> Processing Done bit P17+1 <15:0> Neural Net PEM Isolation Result <0> Processing Done bit <11:1> Digitized Neuron Output CDF-152 Page 128 DETECTOR COMPONENT BANKS <15:12> Comparator Bits (enabled) <31:16> Neural Net CEM B-Tag Result <27:16> Digitized Neuron Output <31:28> Comparator Bits (not enabled) <30> Processing Done bit -------------------------------------------------------------- Data for Block 18, Nemesis-Neural-Net-Cluster Seed Latch -------------------------------------------------------------- P18 <4:0> NN CEM (Iso) Cluster 1, Phi Seed Index <9:5> NN CEM (Iso) Cluster 1, Eta Seed Index <20:16> NN CEM (Iso) Cluster 2, Phi Seed Index <25:21> NN CEM (Iso) Cluster 2, Eta Seed Index P18+1 <4:0> NN PEM (Iso) Cluster, Phi Seed Index <9:5> NN PEM (Iso) Cluster, Eta Seed Index <20:16> NN CEM BTag Cluster, Phi Seed Index <25:21> NN CEM BTag Cluster, Eta Seed Index -------------------------------------------------------------- Data for Block 19, Mercury_ELF1 Module Forward Electrons and Photons (No Tracking) -------------------------------------------------------------- P19...P19+4 Duplicate of Block 7, Mercury_ELP1 for Forward Electrons/Photons Not yet implemented -------------------------------------------------------------- Data for Block 20, Mercury_ELC2 Module Central Electrons and Photons -------------------------------------------------------------- P20...P20+4 Duplicate of Block 11, Mercury_ELC1 for Central Electrons/Photons Except that this Module accepts only Cluster from EM Calorimetry pass #2 (Cluster Code 6) -------------------------------------------------------------- Data for Block 21, Mercury_ELC3 Module Central Electrons and Photons -------------------------------------------------------------- P21...P21+4 Duplicate of Block 11, Mercury_ELC1 for Central Electrons/Photons Except that this Module accepts only Cluster from EM Calorimetry pass #3 (Cluster Code 7) Not yet implemented -------------------------------------------------------------- Data for Block 22, Mercury_ELP2 Module Plug Electrons and Photons (No Tracking) -------------------------------------------------------------- P22...P22+4 Duplicate of Block 7, Mercury_ELP1 Except that this Module accepts only Cluster from EM Calorimetry pass #2 (Cluster Code 6) Not yet implemented CDF-152 Page 129 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 23, Mercury_ELP3 Module Plug Electrons and Photons (No Tracking) -------------------------------------------------------------- P23...P23+4 Duplicate of Block 7, Mercury_ELP1 Except that this Module accepts only Cluster from EM Calorimetry pass #3 (Cluster Code 7) Not yet implemented -------------------------------------------------------------- Data for Block 24, Mercury_ELF2 Module Forward Electrons and Photons (No Tracking) -------------------------------------------------------------- P24...P24+4 Duplicate of Block 19, Mercury_ELF1 for Forward Electrons/Photons Except that this Module accepts only Cluster from EM Calorimetry pass #2 (Cluster Code 6) Not yet implemented -------------------------------------------------------------- Data for Block 25, Mercury_ELF3 Module Forward Electrons and Photons (No Tracking) -------------------------------------------------------------- P25...P25+4 Duplicate of Block 19, Mercury_ELF1 for Forward Electrons/Photons Except that this Module accepts only Cluster from EM Calorimetry pass #3 (Cluster Code 7) Not yet implemented -------------------------------------------------------------- Data for Block 26, Nemesis_CES/CPR Latch -------------------------------------------------------------- P26...P26+1 Not yet implemented or defined (Future site of CES/CPR Trigger Latch bits) ============================================================================== CDF-152 Page 130 DETECTOR COMPONENT BANKS 7.40 TNND Bank - Level 2 Calorimeter Neural Net Trigger Bank This bank contains the contents of the digitized neuron outputs of up to four Analog Neural Network chips in the Level 2 Calorimeter Neural Net Trigger System, and the digitized inputs of one of the chips. Optionally, it can contain two extra diagnostic blocks of information to monitor the performance of the Neural Net system. ____ _______ Bank History 13-May-1992 DW Original Creation 2-June-1992 WFB Add more descriptive comments 6-Oct-1992 WFB Shorten blocks 1-4, and correct mistakes Add blocks 5 and 6 The TNND bank header values are: Bank Name : "TNND" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TNND bank format is: Displacement (I*4) Contents Description 0 5-7 Number of Blocks (diagnostic blocks are optional) 1 P0 Pointer to block 0, Neuron Inputs 2 P1 Pointer to block 1, Neuron Outputs, Board #1 3 P2 Pointer to block 2, Neuron Outputs, Board #2 4 P3 Pointer to block 3, Neuron Outputs, Board #3 5 P4 Pointer to block 4, Neuron Outputs, Board #4 6 P5 Pointer to block 5, Reference Voltages (diagnostic) 7 P6 Pointer to block 6, Board #4 Neuron Inputs (diagnostic) 8 P7 End of Data Pointer ------------------------------------------------------------------------- Data for Block 0, Digitized Neuron Inputs ------------------------------------------------------------------------ Block 0: Digitized Input Data -- Analog signals from the Neural Net Crate back plane. This block will be the digitized values of the last cluster that was found and sent to the NN Crate. If no NN clusters were found in the event, then all data in this bank will be invalid and should be ignored. The order of readout is from center of detector (abs(eta) = 0) outward. CDF-152 Page 131 DETECTOR COMPONENT BANKS FASTBUS READOUT: Block 0 is a fixed length block read via a data space block transfer from NEURALNET_INTERFACE_0, Registers 0-3F. Word = I*4, Offset = P0 + Word Number Word Fastbus DSR Bits Item Description ---- ----------- ---- ---- ------------- 0 0 <11:0> NN01 analog signal 1, EM * note interleaving 1 1 <11:0> NN02 analog signal 2, EM * of EM and HAD info. 2 2 <11:0> NN03 analog signal 3, EM 3 3 <11:0> NN04 analog signal 4, EM 4 4 <11:0> NN05 analog signal 5, EM 5 5 <11:0> NN06 analog signal 6, HAD 6 6 <11:0> NN07 analog signal 7, HAD 7 7 <11:0> NN08 analog signal 8, HAD 8 8 <11:0> NN09 analog signal 9, HAD 9 9 <11:0> NN10 analog signal 10, HAD 10 A <11:0> NN11 analog signal 11, EM 11 B <11:0> NN12 analog signal 12, EM 12 C <11:0> NN13 analog signal 13, EM 13 D <11:0> NN14 analog signal 14, EM 14 E <11:0> NN15 analog signal 15, EM 15 F <11:0> NN16 analog signal 16, HAD 16 10 <11:0> NN17 analog signal 17, HAD 17 11 <11:0> NN18 analog signal 18, HAD 18 12 <11:0> NN19 analog signal 19, HAD 19 13 <11:0> NN20 analog signal 20, HAD 20 14 <11:0> NN21 analog signal 21, EM 21 15 <11:0> NN22 analog signal 22, EM 22 16 <11:0> NN23 analog signal 23, EM 23 17 <11:0> NN24 analog signal 24, EM 24 18 <11:0> NN25 analog signal 25, EM 25 19 <11:0> NN26 analog signal 26, HAD 26 1A <11:0> NN27 analog signal 27, HAD 27 1B <11:0> NN28 analog signal 28, HAD 28 1C <11:0> NN29 analog signal 29, HAD 29 1D <11:0> NN30 analog signal 30, HAD 30 1E <11:0> NN31 analog signal 31, EM 31 1F <11:0> NN32 analog signal 32, EM 32 20 <11:0> NN33 analog signal 33, EM 33 21 <11:0> NN34 analog signal 34, EM 34 22 <11:0> NN35 analog signal 35, EM 35 23 <11:0> NN36 analog signal 36, HAD 36 24 <11:0> NN37 analog signal 37, HAD 37 25 <11:0> NN38 analog signal 38, HAD 38 26 <11:0> NN39 analog signal 39, HAD 39 27 <11:0> NN40 analog signal 40, HAD 40 28 <11:0> NN41 analog signal 41, EM 41 29 <11:0> NN42 analog signal 42, EM 42 2A <11:0> NN43 analog signal 43, EM 43 2B <11:0> NN44 analog signal 44, EM 44 2C <11:0> NN45 analog signal 45, EM 45 2D <11:0> NN46 analog signal 46, HAD 46 2E <11:0> NN47 analog signal 47, HAD CDF-152 Page 132 DETECTOR COMPONENT BANKS 47 2F <11:0> NN48 analog signal 48, HAD 48 30 <11:0> NN49 analog signal 49, HAD 49 31 <11:0> NN50 analog signal 50, HAD 50 32 <11:0> NN51 analog signal 51 51 33 <11:0> NN52 analog signal 52 52 34 <11:0> NN53 analog signal 53 53 35 <11:0> NN54 analog signal 54 54 36 <11:0> NN55 analog signal 55 55 37 <11:0> NN56 analog signal 56 56 38 <11:0> NN57 analog signal 57 57 39 <11:0> NN58 analog signal 58 58 3A <11:0> NN59 analog signal 59 59 3B <11:0> NN60 analog signal 60 60 3C <11:0> NN61 analog signal 61 61 3D <11:0> NN62 analog signal 62 62 3E <11:0> NN63 analog signal 63 63 3F <11:0> NN64 analog signal 64 ------------------------------------------------------------------------- Data for Block 1, Digitized Neuron Outputs, Board #1 ------------------------------------------------------------------------ Block 1: Contains the First Central Photon NNet board results. ------- FASTBUS READOUT: Block 1 is a fixed length block read via a data space block transfer from NEURALNET_INTERFACE_0, Registers 40-43, and can be implemented as a continuation of the block transfer from Block 0. Word = I*4, Offset = P1 + Word Number Word FB DSR Bits Item Description ---- ------ ---- ---- ------------- 0 40 <11:0> Neuron1 Output of neuron 1, Central Photon board #1 1 41 <11:0> Neuron2 Output of neuron 2, Central Photon board #1 2 42 <11:0> Neuron3 Output of neuron 3, Central Photon board #1 3 43 <11:0> Neuron4 Output of neuron 4, Central Photon board #1 ------------------------------------------------------------------------- Data for Block 2, Digitized Neuron Outputs, Board #2 ------------------------------------------------------------------------ Block 2: Contains the Second Central Photon NNet board results. -------- FASTBUS READOUT: Block 2 is a fixed length block read via a data space block transfer from NEURALNET_INTERFACE_1, Registers 40-43. Module NEURALNET_INTERFACE_1 and this block may not always exist. CDF-152 Page 133 DETECTOR COMPONENT BANKS Word = I*4, Offset = P2 + Word Number Word FB DSR Bits Item Description ---- ------ ---- ---- ------------- 0 40 <11:0> Neuron1 Output of neuron 1, Central Photon board #2 1 41 <11:0> Neuron2 Output of neuron 2, Central Photon board #2 2 42 <11:0> Neuron3 Output of neuron 3, Central Photon board #2 3 43 <11:0> Neuron4 Output of neuron 4, Central Photon board #2 ------------------------------------------------------------------------- Data for Block 3, Digitized Neuron Outputs, Board #3 ------------------------------------------------------------------------ Block 3: Contains the Plug Electron/Photon NNet board results. ------- FASTBUS READOUT: Block 3 is a fixed length block read via a data space block transfer from NEURALNET_INTERFACE_2, Registers 40-43. Module NEURALNET_INTERFACE_2 and this block may not always exist. Word = I*4, Offset = P3 + Word Number Word FB DSR Bits Item Description ---- ------ ---- ---- ------------- 0 40 <11:0> Neuron1 Output of neuron 1, Plug Photon/Electron board 1 41 <11:0> Neuron2 Output of neuron 2, Plug Photon/Electron board 2 42 <11:0> Neuron3 Output of neuron 3, Plug Photon/Electron board 3 43 <11:0> Neuron4 Output of neuron 4, Plug Photon/Electron board ------------------------------------------------------------------------- Data for Block 4, Digitized Neuron Outputs, Board #4 ------------------------------------------------------------------------ Block 4: Contains results of the Central Electron NNet board. ------- FASTBUS READOUT: Block 4 is a fixed length block read via a data space block transfer from NEURALNET_INTERFACE_3, Registers 40-43. Module NEURALNET_INTERFACE_3 and this block may not always exist. Word = I*4, Offset = P4 + Word Number Word FB DSR Bits Item Description ---- ------ ---- ---- ------------- 0 40 <11:0> Neuron1 Output of neuron 1, Central Electron board 1 41 <11:0> Neuron2 Output of neuron 2, Central Electron board 2 42 <11:0> Neuron3 Output of neuron 3, Central Electron board CDF-152 Page 134 DETECTOR COMPONENT BANKS 3 43 <11:0> Neuron4 Output of neuron 4, Central Electron board ------------------------------------------------------------------------- Data for Block 5, Reference Voltage diagnostic information ------------------------------------------------------------------------ Block 5: Contains the Reference and Bias Voltage settings for each ------- of the 4 Neural Net Boards. FASTBUS READOUT: Block 5 is a fixed length block read from all four NEURALNET_INTERFACE_0...3. This bank contains digitized reference and bias voltages from the boards, and is present for diagnostic purposes. (That is, this block may be deleted in the future to speed read out time.) All reads are single reads from CSR. Word = I*4, Offset = P5 + Word Number Word FB CSR Bits Description ---- ------ ---- ----------- Read from NEURALNET_INTERFACE_0, Central Photon Board #1: 0 C0000002 <0:11> VRef_I, Neuron Input Reference voltage 1 C0000003 <0:11> VRef_O, Neuron Output Reference voltage 2 C0000004 <0:11> Comparator Threshold voltage 3 C0000005 <0:11> VBias, Neuron Input Bias Voltage 4 C0000006 <0:11> VGain, Neuron Output Sigmoid Function Bias Voltage Read from NEURALNET_INTERFACE_1, Central Photon Board #2: 5 C0000002 <0:11> VRef_I, Neuron Input Reference voltage 6 C0000003 <0:11> VRef_O, Neuron Output Reference voltage 7 C0000004 <0:11> Comparator Threshold voltage 8 C0000005 <0:11> VBias, Neuron Input Bias Voltage 9 C0000006 <0:11> VBias, Neuron Output Sigmoid Function Bias Voltage Read from NEURALNET_INTERFACE_2, Plug Photon/Electron Board: 10 C0000002 <0:11> VRef_I, Neuron Input Reference voltage 11 C0000003 <0:11> VRef_O, Neuron Output Reference voltage 12 C0000004 <0:11> Comparator Threshold voltage 13 C0000005 <0:11> VBias, Neuron Input Bias Voltage 14 C0000006 <0:11> VBias, Neuron Output Sigmoid Function Bias Voltage Read from NEURALNET_INTERFACE_3, Central Electron Board: 15 C0000002 <0:11> VRef_I, Neuron Input Reference voltage 16 C0000003 <0:11> VRef_O, Neuron Output Reference voltage 17 C0000004 <0:11> Comparator Threshold voltage 18 C0000005 <0:11> VBias, Neuron Input Bias Voltage 19 C0000006 <0:11> VBias, Neuron Output Sigmoid Function Bias Voltage ------------------------------------------------------------------------- Data for Block 6, Bias Inputs for Plug Electron/Photon Board ------------------------------------------------------------------------ CDF-152 Page 135 DETECTOR COMPONENT BANKS Block 6: Contains the digitized value of the last 15 analog inputs to ------- the Plug Electron/Photon Board. This is also a diagnostic bank, and may be deleted to speed read out time. The Plug board is specially modified so that these 15 inputs come from DACs rather than the analog backplane. FASTBUS READOUT: Block 6 is a fixed length block read from board NEURALNET_INTERFACE_2, data space registers 31-3F (hex) Word = I*4, Offset = P6 + Word Number Word FB DSR Bits Description ---- ------ ---- ----------- 0 31 <0:11> Neuron Input 50 (from DAC) 1 32 <0:11> Neuron Input 51 (from DAC) . . . 13 3E <0:11> Neuron Input 63 (from DAC) 14 3F <0:11> Neuron Input 64 (from DAC) ************************************************************************** CDF-152 Page 136 DETECTOR COMPONENT BANKS 7.41 TCSD Bank - Level 2 Trigger Interceptor Bank This bank contains the contents of the trigger Interceptor Boards, which latch and store the ET, ETcosphi, etc. sums from each trigger Cratesum for each digitization. They thus contain the sums from each of 10 crates for each Level 1 sum, each Level 2 cluster, and the Level 2 muons and stiff tracks. See the notes below for further detail, and the UC TGNs for more. Level 2 Clustering algorithm was changed somewhat for the 1992/93 run. See the TL2D bank description for more information. Bank History ____________ 20-Aug-1986 HJF Original Creation 26-Oct-1986 HJF Change block order per MJS and MKC instructions 02-Nov-1986 HJF Change from I*4 to I*2 12-Dec-1986 HJF Change from I*2 to I*4 15-Sep-1987 TC No of blocks = 64. 15-Mar-1988 CP Description for blocks 60 - 62. 27-Aug-1993 WFB Describe new CMU and CMX flags, block 63 Add comments to tower count Update cluster codes The TCSD bank header values are: Bank Name : "TCSD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TCSD bank format is: Displacement (I*4) Contents Description 0 64 No. of Blocks 1 P0=66 Pointer to block 0, Interceptor 0,Iblock 0 2 P1 Pointer to block 1, Interceptor 0,Iblock 1 3 P2 Pointer to block 2, Interceptor 0,Iblock 2 4 P3 Pointer to block 3, Interceptor 0,Iblock 3 5 P4 Pointer to block 4, Interceptor 1,Iblock 0 . . . . . . . . . . . . . . 60 P59 Pointer to block 59, Interceptor 14,Iblock 3 . . . . . 64 P63 Pointer to block 63 65 P64 End of Data Pointer -------------------------------------------------------------- Data for Block 0, Interceptor 0, Iblock 0 -------------------------------------------------------------- P0 EM0 Ntow,Cl 0 EM crate 0, Ntower Cluster 0 CDF-152 Page 137 DETECTOR COMPONENT BANKS P0+1 EM0 Ntow,Cl 1 EM crate 0, Ntower Cluster 1 . . . . . . . . . . . . . . P0+N-1 EM0 Ntow,Cl N-1 EM crate 0, Ntower Cluster NDIG-1 -------------------------------------------------------------- Data for Block 1, Interceptor 0, Iblock 1 -------------------------------------------------------------- P1 EM0 ET,Cl 0 EM crate 0, Sum ET Cluster 0 P1+1 EM0 ET,Cl 1 EM crate 0, Sum ET Cluster 1 . . . . . . . . . . . . . . P1+N-1 EM0 ET,Cl N-1 EM crate 0, Sum ET Cluster NDIG-1 -------------------------------------------------------------- Data for Block 2, Interceptor 0, Iblock 2 -------------------------------------------------------------- P2 HAD0 Ntow,Cl 0 HAD crate 0, Ntower Cluster 0 P2+1 HAD0 Ntow,Cl 1 HAD crate 0, Ntower Cluster 1 . . . . . . . . . . . . . . P2+N-1 HAD0 Ntow,Cl N-1 HAD crate 0, Ntower Cluster NDIG-1 -------------------------------------------------------------- Data for Block 3, Interceptor 0, Iblock 3 -------------------------------------------------------------- P3 HAD0 ET,Cl 0 HAD crate 0, Sum ET Cluster 0 P3+1 HAD0 ET,Cl 1 HAD crate 0, Sum ET Cluster 1 . . . . . . . . . . . . . . P3+N-1 HAD0 ET,Cl N-1 HAD crate 0, Sum ET Cluster NDIG-1 -------------------------------------------------------------- Data for Block 4, Interceptor 1, Iblock 0 -------------------------------------------------------------- P4 EM0 ETy,Cl 0 EM crate 0, Sum ETy Cluster 0 P4+1 EM0 ETy,Cl 1 EM crate 0, Sum ETy Cluster 1 . . . . . . . . . . . . . . P4+N-1 EM0 ETy,Cl N-1 EM crate 0, Sum ETy Cluster NDIG-1 -------------------------------------------------------------- Data for Block 5, Interceptor 1, Iblock 1 -------------------------------------------------------------- P5 EM0 ETy2,Cl 0 EM crate 0, Sum ETy2 Cluster 0 P5+1 EM0 ETy2,Cl 1 EM crate 0, Sum ETy2 Cluster 1 . . . . . . . . . . . . . . P5+N-1 EM0 ETy2,Cl N-1 EM crate 0, Sum ETy2 Cluster NDIG-1 CDF-152 Page 138 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 6, Interceptor 1, Iblock 2 -------------------------------------------------------------- P6 HAD0 ETy,Cl 0 HAD crate 0, Sum ETy Cluster 0 P6+1 HAD0 ETy,Cl 1 HAD crate 0, Sum ETy Cluster 1 . . . . . . . . . . . . . . P6+N-1 HAD0 ETy,Cl N-1 HAD crate 0, Sum ETy Cluster NDIG-1 -------------------------------------------------------------- Data for Block 7, Interceptor 1, Iblock 3 -------------------------------------------------------------- P7 HAD0 ETy2,Cl 0 HAD crate 0, Sum ETy2 Cluster 0 P7+1 HAD0 ETy2,Cl 1 HAD crate 0, Sum ETy2 Cluster 1 . . . . . . . . . . . . . . P7+N-1 HAD0 ETy2,Cl N-1 HAD crate 0, Sum ETy2 Cluster NDIG-1 -------------------------------------------------------------- Data for Block 8, Interceptor 2, Iblock 0 -------------------------------------------------------------- P8 EM0 Cosphi_ET,Cl 0 EM crate 0, Sum Cosphi_ET Cluster 0 P8+1 EM0 Cosphi_ET,Cl 1 EM crate 0, Sum Cosphi_ET Cluster 1 . . . . . . . . . . . . . . P8+N-1 EM0 Cosphi_ET,Cl N-1 EM crate 0, Sum Cosphi_ET Cluster NDIG-1 -------------------------------------------------------------- Data for Block 9, Interceptor 2, Iblock 1 -------------------------------------------------------------- P9 EM0 Sinphi_ET,Cl 0 EM crate 0, Sum Sinphi_ET Cluster 0 P9+1 EM0 Sinphi_ET,Cl 1 EM crate 0, Sum Sinphi_ET Cluster 1 . . . . . . . . . . . . . . P9+N-1 EM0 Sinphi_ET,Cl N-1 EM crate 0, Sum Sinphi_ET Cluster NDIG-1 -------------------------------------------------------------- Data for Block 10, Interceptor 2, Iblock 2 -------------------------------------------------------------- P10 HAD0 Cosphi_ET,Cl 0 HAD crate 0, Sum Cosphi_ET Cluster 0 P10+1 HAD0 Cosphi_ET,Cl 1 HAD crate 0, Sum Cosphi_ET Cluster 1 . . . . . . . . . . . . . . P10+N-1 HAD0 Cosphi_ET,Cl N-1 HAD crate 0, Sum Cosphi_ET Clustr NDIG-1 -------------------------------------------------------------- Data for Block 11, Interceptor 2, Iblock 3 CDF-152 Page 139 DETECTOR COMPONENT BANKS -------------------------------------------------------------- P11 HAD0 Sinphi_ET,Cl 0 HAD crate 0, Sum Sinphi_ET Cluster 0 P11+1 HAD0 Sinphi_ET,Cl 1 HAD crate 0, Sum Sinphi_ET Cluster 1 . . . . . . . . . . . . . . P11+N-1 HAD0 Sinphi_ET,Cl N-1 HAD crate 0, Sum Sinphi_ET Clustr NDIG-1 -------------------------------------------------------------- Data for Block 12, Interceptor 3, Iblock 0 -------------------------------------------------------------- P12 EM0 Ntow,Cl 0 EM crate 1, Ntower Cluster 0 P12+1 EM0 Ntow,Cl 1 EM crate 1, Ntower Cluster 1 . . . . . . . . . . . . . . P12+N-1 EM0 Ntow,Cl N-1 EM crate 1, Ntower Cluster NDIG-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -------------------------------------------------------------- Data for Block 59, Interceptor 14, Iblock 3 -------------------------------------------------------------- P59 HAD5 Sinphi_ET,Cl 0 HAD crate 5, Sum Sinphi_ET Cluster 0 P59+1 HAD5 Sinphi_ET,Cl 1 HAD crate 5, Sum Sinphi_ET Cluster 1 . . . . . . . . . . . . . . P59+N-1 HAD5 Sinphi_ET,Cl N-1 HAD crate 5, Sum Sinphi_ET Clustr NDIG-1 -------------------------------------------------------------- Data for Block 60, Interceptor 15, Iblock 0 -------------------------------------------------------------- Bits P60 <0> blank <4:1> Cl code,Cl 0 Cluster code 1 = Calorimeter "Jet" Cluster 2 = Sum-ET Cluster (aka "L1 Repeat") 3 = Muon Cluster 4 = Stiff Track Cluster 5 = EM Calorimeter Pass 1 6 = EM Calorimeter Pass 2 7 = EM Calorimeter Pass 3 8-15 = Undefined <10:5> Yseed, Cl 0 Eta of seed tower, Cluster 0 P60+1 <0> blank <4:1> Cl code,Cl 1 Cluster code, Cluster 1 <10:5> Yseed, Cl 1 Eta of seed tower, Cluster 0 . . . . . . . P60+N-1 <0> blank <4:1> Cl code,Cl N-1 Cluster code, Cluster N-1 CDF-152 Page 140 DETECTOR COMPONENT BANKS <10:5> Yseed, Cl N-1 Eta of seed tower, Cluster N-1 -------------------------------------------------------------- Data for Block 61, Interceptor 15, Iblock 1 -------------------------------------------------------------- Bits P61 <0> blank <5:1> Phiseed, CL 0 Phi of seed tower, Cluster 0 <6> Strk flag,Cl 0 Stiff track present, Cluster 0 <9:7> Strk |Pt|,Cl 0 |Pt| from track processor, Cluster 0 <10> Pt sign, Cl 0 Sign of |Pt| (0 = +ve, 1 = -ve) P61+1 <0> blank <5:1> Phiseed, CL 1 Phi of seed tower, Cluster 1 <6> Strk flag,Cl 1 Stiff track present, Cluster 1 <9:7> Strk |Pt|,Cl 1 |Pt| from track processor, Cluster 1 <10> Pt sign, Cl 1 Sign of |Pt| (0 = +ve, 1 = -ve) . . . . . . . P61+N-1 <0> blank <5:1> Phiseed, CL N-1 Phi of seed tower, Cluster N-1 <6> Strk flag,Cl N-1 Stiff track present, Cluster N-1 <9:7> Strk |Pt|,Cl N-1 |Pt| from track processor, Cluster N-1 <10> Pt sign, Cl N-1 Sign of |Pt| (0 = +ve, 1 = -ve) -------------------------------------------------------------- Data for Block 62, Interceptor 15, Iblock 2 -------------------------------------------------------------- Bits P62 <0> blank <8:1> Ntwrs, CL 0 Number of trigger towers in cluster, Cluster 0 <10:9> blank <11> Tower Count Overflow Bit, Cluster 0 P62+1 <0> blank <8:1> Ntwrs, CL 1 Number of trigger towers in cluster, Cluster 1 <10:9> blank <11> Tower Count Overflow Bit, Cluster 1 . . . . . . . P62+N-1 <0> blank <8:1> Ntwrs, CL N-1 Number of trigger towers in cluster, Cluster N-1 <10:9> blank <11> Tower Count Overflow Bit, Cluster N-1 NB: This Tower Count quantity is the sum of all the tower counts from the other interceptors. Individual tower counts also have overflow bits. The overflow bit is not carried over to the Cluster Memories (TL2D bank). -------------------------------------------------------------- Data for Block 63, Interceptor 15, Iblock 3 -------------------------------------------------------------- Bit CDF-152 Page 141 DETECTOR COMPONENT BANKS P63 <0> Blank <1> CMX Muon Cluster Flag, Cluster 0 <2> CMU/CMP Muon Cluster Flag, Cluster 0 ... P63+N-1 <0> Blank <1> CMX Muon Cluster Flag, Cluster N-1 <2> CMU/CMP Muon Cluster Flag, Cluster N-1 NB: These detector flags bits are valid only when for Muon Clusters (Cluster Code 3). (Disregard for all other cluster types.) -------------------------------------------------------------- The format of each word in every block from 0 to 59 is: Bits Length(bits) Name Description ==== ============ ======== =========== (0:11) 12 Crate Sum Output The sum for that crate for one of the quantities EtCosphi, Etsinphi,Ntowers,Et,y, y-squared (12:31) not used. -------------------------------------------------------------- Notes: 1. Number of Blocks. There are 6 quantities per crate, times 5 racks, times 2 (EM/Had) crates/rack =60 quantities. There is one block per quantity. Each interceptor takes 4 quantities: hence 15 interceptors. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers . 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. This Bank is of variable length. Anyone not depending on the pointers is either dead or blissfully unaware. WATCH OUT! 5. This bank contains the raw event-by-event data from the interceptor boards . These boards intercept the outputs from the Crate sums for each cluster and CDF-152 Page 142 DETECTOR COMPONENT BANKS store them in memory. As there is a great deal of data it is not clear whether or not we will want this bank in the raw data for all events, but it is clear it is an important diagnostic tool at least. 6. There are 15 interceptor boards. Each board has 4 blocks of data: EM-A, EM-B,HAD-A,HAD-B, where EM and HAD refer to the EM and HAD trigger crates, and the A and B refer to 2 of the 6 quantities ETCosphi,ETSinphi,N (the number of towers), ET, Sum ETy, and Sum ETy2 for each cluster. The correspondence of boards to detector components is: _____ ___ ____ _____ Board W/E Comp Block 0 1 2 3 Interceptor 0 West: FEM: N, ET FHA: N, ET Interceptor 1 West: FEM: ETy, ETy2 FHA: ETy, ETy2 Interceptor 2 West: FEM: ETcos,ETsin FHA: ETcos, ETsin Interceptor 3 West: PEM: N, ET PHA: N, ET Interceptor 4 West: PEM: ETy, ETy2 PHA: ETy, ETy2 Interceptor 5 West: PEM: ETcos,ETsin PHA: ETcos, ETsin Interceptor 6 Cent: CEM: N, ET CHA: N, ET Interceptor 7 Cent: CEM: ETy, ETy2 CHA: ETy, ETy2 Interceptor 8 Cent: CEM: ETcos,ETsin CHA: ETcos, ETsin Interceptor 9 East: PEM: N, ET PHA: N, ET Interceptor 10 East: PEM: ETy, ETy2 PHA: ETy, ETy2 Interceptor 11 East: PEM: ETcos,ETsin PHA: ETcos, ETsin Interceptor 12 East: FEM: N, ET FHA: N, ET Interceptor 13 East: FEM: ETy, ETy2 PHA: ETy, ETy2 Interceptor 14 East: FEM: ETcos,ETsin FHA: ETcos, ETsin 7. The way we suggest reading out this bank is first to read the number of digitizations NDIG latched by the inteceptor modules in a single-word transfer from the module, and then do block transfers. The bank is organized so that each block is one transfer. In general NDIG will be the number of Level 1 sums digitized (usually 4, being the A,B,C, and D sums) plus the number of Level 2 'clusters'. It will be the same for all interceptor modules. 8. For the 1988/89 run, the first four clusters are the Level 1 Result latch. The remaining clusters are from Level 2. For the 1992/93 run, the Crate Sums were not used in Level 1 and the data for the first four clusters in TCSD is filled with dummy data for CDF-152 Page 143 DETECTOR COMPONENT BANKS backwards compatibility, followed by real Level 2 clusters. In the future these dummy clusters may be deleted to save scan time and data space. CDF-152 Page 144 DETECTOR COMPONENT BANKS 7.42 TFRD Bank - CDF FRED Detector Bank This bank contains the raw event-by-event data from CDF FRED. Bank History ____________ 19-Aug-1986 HJF Original Creation 27-Oct-1986 HJF Add note on bunch crossing (good for Terry!) 8-Jul-1988 MC Add 3 words The TFRD bank header values are: Bank Name : "TFRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TFRD bank format is: Displacement (I*4) Contents Description 0 1 No. of Blocks 1 3 Pointer to block 0, Event trigger data 2 7 End of Data Pointer -------------------------------------------------------------- Data for Block 0, Event Trigger Data -------------------------------------------------------------- 3 CDF_FRED_DATA L1 and L2 latched inputs and outputs, etc. 4 CDF_LEVEL1 16 level 1 triggers 5 LEVEL 0 DATA Level 0 inputs and Level 0 triggers 6 BUNCH ID ID of bunch which caused trigger -------------------------------------------------------------- The format of CDF_FRED_DATA word 0 is: Bits Length(bits) Description ==== ============ =========== (0:11) 12 Level 1 inputs (12:15) 4 Level 1 RAM outputs (16:21) 6 Level 2 Accept inputs (22:27) 6 Level 2 Reject inputs (28:30) 3 Bunch Identification # (A,B,C..) (31) 1 Internal Level 2 Accept CDF-152 Page 145 DETECTOR COMPONENT BANKS -------------------------------------------------------------- The format of CDF_LEVEL1 word 1 is: Bits Length(bits) Description ==== ============ =========== (0:15) 16 Level 1 triggers. This word comes from bits (12:15) of the CDF FRED registers C0000026, C000002E, C0000036, C000003E. (16:31) 16 blank -------------------------------------------------------------- The format of LEVEL 0 DATA word 2 is: Bits Length(bits) Description ==== ============ =========== (0:11) 12 Level 0 inputs (12) 1 Level 0 accept (13) 1 Level 0 inhibit (14) 1 Level 0 query (15) 1 Beam crossing (16:31) 16 Level 0 triggers -------------------------------------------------------------- The format of BUNCH ID word 3 is: Bits Length(bits) Description ==== ============ =========== (0:3) 4 BUNCH ID (4:31) 28 blank -------------------------------------------------------------- Notes: 1. Number of Blocks. There is only one block read out from CDF FRED. There is, however, a great deal of information about the state of FRED at run startup time: this information is in the TFRC block and is fixed for a given run. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The word count for each Block is difference between adjacent Pointers . 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. This Bank is of fixed length. CDF-152 Page 146 DETECTOR COMPONENT BANKS 5. Word 2 comes from the level 0 latch, word 0, bits 0:31. The bit definitions correspond to the Level 0 Scaler channels 0:31 in SCLD. 6. The bunch ID in word 3 comes form the level 0 latch, word 1, bits 0:3. 7. The data in this bank provide information read out by the Trigger Scanner for each event which generates a L2A to the TS. More details are given in CDF-364. Bits 0 to 11 are the latched level 1 inputs which address the Level 1 lookup table (RAM). Bits 12 to 15 are the outputs of the four RAMs. These in general will have different rate limiter values (set up at start of run). The Level 1 Accept is the OR of these four bits. The four bits in the first word are repeated in the third word. In addition the third word has the remaining 12 outputs of the rate limiters. Bits 16 to 21 are the Level 2 Accept inputs from up to 6 Level 2 Processors. These are OR'd or AND'd depending on whether the processors have been defined as normal or veto processors at run startup. Bits 22 to 27 are the Level 2 Reject inputs from up to 6 Level 2 Processors. Bits 28 to 30 are the Tevatron Bunch Identification code from the Master Clock. Since Level 0 is installed these bits will be latched at the wrong time and should be ignored. CDF-152 Page 147 DETECTOR COMPONENT BANKS 7.43 TRCD Bank - Raw/Cas Sum Registers This bank contains the registers in the RAW/CAS boards which tell which towers were used in a given sum. Each board-pair has 4 registers of 24 bits each, each bit corresponding to a tower in phi at the eta of that board-pair. The reg- isters are overwritten in Level 2, so they are usually read out only in pre-run diagnostics looking for hot towers or single-tube triggers, etc. Bank History ____________ 26-Oct-1986 HJF Original Creation 02-Nov-1986 HJF Add description per Terry's comment The TRCD bank header values are: Bank Name : "TRCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TRCD bank format is: Displacement (I*4) Contents Description 0 10 No. of Blocks 1 P0 Pointer to block 0, FEM West RAW/CAS Crate 2 P1 Pointer to block 1, FHA West RAW/CAS Crate 3 P2 Pointer to block 2, PEM West RAW/CAS Crate 4 P3 Pointer to block 3, PHA West RAW/CAS Crate 5 P4 Pointer to block 4, CEM RAW/CAS Crate 6 P5 Pointer to block 5, CHA RAW/CAS Crate 7 P6 Pointer to block 6, PEM East RAW/CAS Crate 8 P7 Pointer to block 7, PHA East RAW/CAS Crate 9 P8 Pointer to block 8, FEM East RAW/CAS Crate 10 P9 Pointer to block 9, FHA East RAW/CAS Crate 11 P10 End of Data Pointer -------------------------------------------------------------- Data for Block 0, FEM West RAW/CAS Crate -------------------------------------------------------------- P0 RAW/CAS EM Trigger tower 0 (RAW_WEM_41) Sum Reg A P0+4 RAW/CAS EM Trigger tower 1 (RAW_WEM_39) Sum Reg A P0+8 RAW/CAS EM Trigger tower 2 (RAW_WEM_37) Sum Reg A P0+12 RAW/CAS EM Trigger tower 3 (RAW_WEM_35) Sum Reg A P0+16 RAW/CAS EM Trigger tower 4 (RAW_WEM_33) Sum Reg A P0+20 RAW/CAS EM Trigger tower 5 (RAW_WEM_31) Sum Reg A P0+24 RAW/CAS EM Trigger tower 6 (RAW_WEM_29) Sum Reg A P0+28 RAW/CAS EM Trigger tower 7 (RAW_WEM_27) Sum Reg A P0+32 RAW/CAS EM Trigger tower 8 (RAW_WEM_25) Sum Reg A CDF-152 Page 148 DETECTOR COMPONENT BANKS P0+36 RAW/CAS EM Trigger tower 9 (RAW_WEM_24) Sum Reg A -------------------------------------------------------------- Data for Block 1, FHA West RAW/CAS Crate -------------------------------------------------------------- P1 RAW/CAS HAD Trigger tower 0 (RAW_WHD_41) Sum Reg A P1+4 RAW/CAS HAD Trigger tower 1 (RAW_WHD_39) Sum Reg A P1+8 RAW/CAS HAD Trigger tower 2 (RAW_WHD_37) Sum Reg A P1+12 RAW/CAS HAD Trigger tower 3 (RAW_WHD_35) Sum Reg A P1+16 RAW/CAS HAD Trigger tower 4 (RAW_WHD_33) Sum Reg A P1+20 RAW/CAS HAD Trigger tower 5 (RAW_WHD_31) Sum Reg A P1+24 RAW/CAS HAD Trigger tower 6 (RAW_WHD_29) Sum Reg A P1+28 RAW/CAS HAD Trigger tower 7 (RAW_WHD_27) Sum Reg A P1+32 RAW/CAS HAD Trigger tower 8 (RAW_WHD_25) Sum Reg A P1+36 RAW/CAS HAD Trigger tower 9 (RAW_WHD_24) Sum Reg A -------------------------------------------------------------- Data for Block 2, PEM West RAW/CAS Crate -------------------------------------------------------------- P2 RAW/CAS EM Trigger tower 9 (RAW_WEM_23) Sum Reg A P2+4 RAW/CAS EM Trigger tower 10 (RAW_WEM_21) Sum Reg A P2+8 RAW/CAS EM Trigger tower 11 (RAW_WEM_19) Sum Reg A P2+12 RAW/CAS EM Trigger tower 12 (RAW_WEM_17) Sum Reg A P2+16 RAW/CAS EM Trigger tower 13 (RAW_WEM_15) Sum Reg A P2+20 RAW/CAS EM Trigger tower 14 (RAW_WEM_13) Sum Reg A P2+24 RAW/CAS EM Trigger tower 15 (RAW_WEM_11) Sum Reg A -------------------------------------------------------------- Data for Block 3, PHA West RAW/CAS Crate -------------------------------------------------------------- P3 RAW/CAS HAD Trigger tower 9 (RAW_WHD_23) Sum Reg A P3+4 RAW/CAS HAD Trigger tower 10 (RAW_WHD_21) Sum Reg A P3+8 RAW/CAS HAD Trigger tower 11 (RAW_WHD_19) Sum Reg A P3+12 RAW/CAS HAD Trigger tower 12 (RAW_WHD_17) Sum Reg A P3+16 RAW/CAS HAD Trigger tower 13 (RAW_WHD_15) Sum Reg A P3+20 RAW/CAS HAD Trigger tower 14 (RAW_WHD_13) Sum Reg A P3+24 RAW/CAS HAD Trigger tower 15 (RAW_WHD_11) Sum Reg A -------------------------------------------------------------- Data for Block 4, CEM RAW/CAS Crate -------------------------------------------------------------- P4 RAW/CAS EM Trigger tower 16 (RAW_WEM_09) Sum Reg A P4+4 RAW/CAS EM Trigger tower 17 (RAW_WEM_07) Sum Reg A P4+8 RAW/CAS EM Trigger tower 18 (RAW_WEM_05) Sum Reg A P4+12 RAW/CAS EM Trigger tower 19 (RAW_WEM_03) Sum Reg A P4+16 RAW/CAS EM Trigger tower 20 (RAW_WEM_01) Sum Reg A P4+20 RAW/CAS EM Trigger tower 21 (RAW_EEM_01) Sum Reg A P4+24 RAW/CAS EM Trigger tower 22 (RAW_EEM_03) Sum Reg A P4+28 RAW/CAS EM Trigger tower 23 (RAW_EEM_05) Sum Reg A P4+32 RAW/CAS EM Trigger tower 24 (RAW_EEM_07) Sum Reg A CDF-152 Page 149 DETECTOR COMPONENT BANKS P4+36 RAW/CAS EM Trigger tower 25 (RAW_EEM_09) Sum Reg A -------------------------------------------------------------- Data for Block 5, CHA RAW/CAS Crate -------------------------------------------------------------- P5 RAW/CAS HAD Trigger tower 16 (RAW_WHD_09) Sum Reg A P5+4 RAW/CAS HAD Trigger tower 17 (RAW_WHD_07) Sum Reg A P5+8 RAW/CAS HAD Trigger tower 18 (RAW_WHD_05) Sum Reg A P5+12 RAW/CAS HAD Trigger tower 19 (RAW_WHD_03) Sum Reg A P5+16 RAW/CAS HAD Trigger tower 20 (RAW_WHD_01) Sum Reg A P5+20 RAW/CAS HAD Trigger tower 21 (RAW_EHD_01) Sum Reg A P5+24 RAW/CAS HAD Trigger tower 22 (RAW_EHD_03) Sum Reg A P5+28 RAW/CAS HAD Trigger tower 23 (RAW_EHD_05) Sum Reg A P5+32 RAW/CAS HAD Trigger tower 24 (RAW_EHD_07) Sum Reg A P5+36 RAW/CAS HAD Trigger tower 25 (RAW_EHD_09) Sum Reg A -------------------------------------------------------------- Data for Block 6, PEM East RAW/CAS Crate -------------------------------------------------------------- P6 RAW/CAS EM Trigger tower 26 (RAW_EEM_11) Sum Reg A P6+4 RAW/CAS EM Trigger tower 27 (RAW_EEM_13) Sum Reg A P6+8 RAW/CAS EM Trigger tower 28 (RAW_EEM_15) Sum Reg A P6+12 RAW/CAS EM Trigger tower 29 (RAW_EEM_17) Sum Reg A P6+16 RAW/CAS EM Trigger tower 30 (RAW_EEM_19) Sum Reg A P6+20 RAW/CAS EM Trigger tower 31 (RAW_EEM_21) Sum Reg A P6+24 RAW/CAS EM Trigger tower 32 (RAW_EEM_23) Sum Reg A -------------------------------------------------------------- Data for Block 7, PHA East RAW/CAS Crate -------------------------------------------------------------- P7 RAW/CAS HAD Trigger tower 26 (RAW_EHD_11) Sum Reg A P7+4 RAW/CAS HAD Trigger tower 27 (RAW_EHD_13) Sum Reg A P7+8 RAW/CAS HAD Trigger tower 28 (RAW_EHD_15) Sum Reg A P7+12 RAW/CAS HAD Trigger tower 29 (RAW_EHD_17) Sum Reg A P7+16 RAW/CAS HAD Trigger tower 30 (RAW_EHD_19) Sum Reg A P7+20 RAW/CAS HAD Trigger tower 31 (RAW_EHD_21) Sum Reg A P7+24 RAW/CAS HAD Trigger tower 32 (RAW_EHD_23) Sum Reg A -------------------------------------------------------------- Data for Block 8, FEM East RAW/CAS Crate -------------------------------------------------------------- P8 RAW/CAS EM Trigger tower 32 (RAW_EEM_24) Sum Reg A P8+4 RAW/CAS EM Trigger tower 33 (RAW_EEM_25) Sum Reg A P8+8 RAW/CAS EM Trigger tower 34 (RAW_EEM_27) Sum Reg A P8+12 RAW/CAS EM Trigger tower 35 (RAW_EEM_29) Sum Reg A P8+16 RAW/CAS EM Trigger tower 36 (RAW_EEM_31) Sum Reg A P8+20 RAW/CAS EM Trigger tower 37 (RAW_EEM_33) Sum Reg A P8+24 RAW/CAS EM Trigger tower 38 (RAW_EEM_35) Sum Reg A P8+28 RAW/CAS EM Trigger tower 39 (RAW_EEM_37) Sum Reg A P8+32 RAW/CAS EM Trigger tower 40 (RAW_EEM_39) Sum Reg A P8+36 RAW/CAS EM Trigger tower 41 (RAW_EEM_41) Sum Reg A CDF-152 Page 150 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 9, FHA East RAW/CAS Crate -------------------------------------------------------------- P9 RAW/CAS HAD Trigger tower 32 (RAW_EHD_24) Sum Reg A P9+4 RAW/CAS HAD Trigger tower 33 (RAW_EHD_25) Sum Reg A P9+8 RAW/CAS HAD Trigger tower 34 (RAW_EHD_27) Sum Reg A P9+12 RAW/CAS HAD Trigger tower 35 (RAW_EHD_29) Sum Reg A P9+16 RAW/CAS HAD Trigger tower 36 (RAW_EHD_31) Sum Reg A P9+20 RAW/CAS HAD Trigger tower 37 (RAW_EHD_33) Sum Reg A P9+24 RAW/CAS HAD Trigger tower 38 (RAW_EHD_35) Sum Reg A P9+28 RAW/CAS HAD Trigger tower 39 (RAW_EHD_37) Sum Reg A P9+32 RAW/CAS HAD Trigger tower 40 (RAW_EHD_39) Sum Reg A P9+36 RAW/CAS HAD Trigger tower 41 (RAW_EHD_41) Sum Reg A -------------------------------------------------------------- -------------------------------------------------------------- Notes: 1. Number of Blocks. There is one block per trigger crate, giving 10 crates total. Five are EM, five are hadron. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers . 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. This Bank is of variable length. Anyone not depending on the pointers is either dead or blissfully unaware. WATCH OUT! 5. This bank contains the raw event-by-event data from the RAW/CAS sum registers. These registers will tell us which towers were used in the last 'cluster' summed by the boards. For example,when Level 1 was the last operation performed, these registers contain the bit map of the towers used in the Level 1 sums. As there is a great deal of data we will not want this bank in the raw data for steady running, but we will need it at the start of every running period for a diagnostic. CDF-152 Page 151 DETECTOR COMPONENT BANKS 6. In each RAW board there are four CAS sum registers, corresponding to the four sum circuits on the board. The four are named Sum Reg A, B, C, and D, and the order of their operation is determined by the Timing Control program run at the time of data taking. Each register contains 24 bits, with each bit corresponding to one tower. The register thus contains 24 towers in phi, all at the same eta. The low order bit is phi=0. 7. The formats above list the address of only Sum Reg A. Sum Regs B,C, and D follow each Sum Reg A in the next three consecutive words. 8. The way we suggest reading out this bank is four single-word transfers from the module. The registers are described in UC/CDF trigger note TGN-25: they are in data space addresses (0:3). All four secondary addresses can be read while maintaining AS-AK lock as you would expect. CDF-152 Page 152 DETECTOR COMPONENT BANKS 7.44 BFLD Bank - B Field Detector Bank This bank has DVM information for the Central Solenoid and Forward Muon Toroid Magnets. ____ _______ Bank History 01-Jul-88 JP New mixed mode version 01-May-92 KB New REAL*4 version 16-Feb-94 RK/KB Definitions for words 6-10 This Bank has the following Bank Header Characteristics:- Bank Name : "BFLD" Bank Number : 1 Bank Type : BNKTR4 (Real*4) The BFLD bank data format is: Displacement from data index Description ------------ ----------- 0 Solenoid DCCT (DVM Ch 0) 1 Solenoid Dump switch DCCT (DVM Ch 1) 2 Solenoid Hall Probe (DVM Ch 2) 3 VREF (DVM Ch 3) 4 spare (DVM Ch 4) 5 FMU toroid current (DVM Ch 5) 6 Metrolab NMR (#84436) 7 Metrolab NMR (#75747) 8 Dump Switch DCCT (#37895) HP DVM 9 Magnet DCCT (#46058) HP DVM 10 FW Bell Hall Probe (#49741) HP DVM Notes: 1. Items 0,1,2,3, and 5 are read from a Transiac scanning DVM (2032)CAMAC crate #1 in RR33H. These should not be considered precision numbers since amplifier gains and offsets and the DVM precision limit accuracy. a) Currents are in units of 1000 amps in floating point format. b) Conversion factors are as follows: Solenoid DCCT 1V = 1000 Amps CDF-152 Page 153 DETECTOR COMPONENT BANKS Solenoid Dump switch 1V = 1000 Amps Solenoid Hall Probe 1V = 1 Tesla VREF 1V = 1000 Amps 2. Items 6, 7 These are digital readouts of the Metralab NMR units via a RS232 interface located in CAMAC crate #1 in RR 33H. The NMR probes are located on the East end of the CTC. The units are milli-Gauss. The absolute accuracy of these devices is +/- 5 ppm , relative precision is +/- 0.1 ppm. Stability is better than 2 ppm/year. This is the most precise and stable monitor of the CDF B field. 3. Items 8,9,10 These quantities are readout via a precision HP multimeter (model 34401A) then via RS232 to a CAMAC C1080 module in RS232 interface located in CAMAC crate #1 in RR 33H. The units are volts x 10**7. a) For the DCCT's 10 V = 5000 amps. So to get the current you take the value in the bank divide by 10**7 and multiply by 500. Note that the Solenoid DCCT reads the magnet current directly but the Dump Switch DCCT reads the magnet current + the current flowing through the fast dump resistor. (typically 40-70 amps) It should be used for stability checks only. b) The hall probe measures Bz of the field but its absolute accuracy is limited. In particular the hall probe is subject to errors because of the probe orientation relative to the field direction. To get the field in Tesla you take the value in location 10, divide by 10**7. Again this value should be used for stability checks only. 4. This bank has no block pointers at the beginning, the first word pointed to by the data index is the solenoid DCCT current. CDF-152 Page 154 DETECTOR COMPONENT BANKS 7.45 CFHD Bank - Ctc Fast Track-finder Hit Bank This bank has Prompt/Delayed Hits from the Latch Card Shift Registers of the the CTC Fast Track-Finder This Bank has the following Bank Header Characteristics:- Bank Name : "CFHD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CFHD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 10 Number of blocks 1 12 Pointer to block 0, SL0 Prompt Hits 2 27 Pointer to block 1, SL2 Prompt Hits 3 51 Pointer to block 2, SL4 Prompt Hits 4 87 Pointer to block 3, SL6 Prompt Hits 5 135 Pointer to block 4, SL8 Prompt Hits 6 195 Pointer to block 5, SL0 Delayed Hits 7 210 Pointer to block 6, SL2 Delayed Hits 8 234 Pointer to block 7, SL4 Delayed Hits 9 270 Pointer to block 8, SL6 Delayed Hits 10 318 Pointer to block 9, SL8 Delayed Hits 11 378 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Superlayer 0 Prompt Hits -------------------------------------------------------------- 12 Data for CTC cells 0, 1 of SL0 13 Data for CTC cells 2, 3 of SL0 . . . . -------------------------------------------------------------- Data for Block 1, Superlayer 2 Prompt Hits -------------------------------------------------------------- 28 Data for CTC cells 0, 1 of SL2 29 Data for CTC cells 2, 3 of SL2 . . . . . . . . etc. CDF-152 Page 155 DETECTOR COMPONENT BANKS The Data for each Block has the format:- Data for cells 0,1 32 bits Data for cells 2,3 32 bits ..... ______ Notes: 1. Each data word has 2 12-bit fields. Each 12-bit field contains the yes-no information about presence/absence of hit data for the 12 sense wires of a CTC supercell ( 1 indicates presence of hit, 0 absence). Bits Contents ---- -------- 0:11 Data for Cell 0 12:15 unused (= 0) 16:27 Data for Cell 1 28:31 unused (= 0) 2. Interior to each 12 bit field, the bit number corresponds to the wire number in the supercell. i.e. Wire 0 (bit 0) is the wire in the supercell with smallest radius, Wire 11 (bit 11) is the one with largest radius. CDF-152 Page 156 DETECTOR COMPONENT BANKS 7.46 CPTD Bank - CENTRAL PENN TRACK Detector Bank This bank has reconstructed tracks and track segments found by the University of Pennsylvania Level 2 Track Processor in the Central Tracking Chamber. The CPTD bank header values are: Bank Name : "CPTD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CPTD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 6 Number of blocks 1 P0 Pointer to block 0, reconstructed tracks. 2 P1 Pointer to block 1, SL 8 track segments. 3 P2 Pointer to block 2, SL 6 track segments. : : : : : 6 P5 Pointer to block 5, SL 0 track segments. 7 P6 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Summary of Found Track Attributes. -------------------------------------------------------------- P0 NTRK Number of tracks found by LINKER P0+1 Track number 0 P0+2 I.D. of segments associated with track number 0 P0+3 Track number 1 P0+4 I.D. of segments associated with track number 1 . . . . P0+(2*NTRK-1) Track number NTRK-1 P0+(2*NTRK) I.D. of segments associated with track number NTRK-1 -------------------------------------------------------------- Data for Block 1, Track segments for SL 8. -------------------------------------------------------------- P1 NSEG8 Number of Segments found in Super Layer 8 (Sum of entries in all six FIFO's) P1+1 SL 8 segment word, segment number 0 P1+2 SL 8 segment word, segment number 1 . . . . P1+NSEG8 SL 8 segment word, segment number NSEG8-1 CDF-152 Page 157 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 2, Track segments for SL 6. -------------------------------------------------------------- P2 NSEG6 Number of Segments found in Super Layer 6 (Sum of entries in all six FIFO's) P2+1 SL 6 segment word, segment number 0 . . . . P2+NSEG6 SL 6 segment word, segment number NSEG6-1 . . . . . . -------------------------------------------------------------- Data for Block 5, Track segments for SL 0. -------------------------------------------------------------- P5 NSEG0 Number of Segments found in Super Layer 0 (Sum of entries in all six FIFO's) P5+1 SL 0 segment word, segment number 0 . . . . P5+NSEG0 SL 0 segment word, segment number NSEG0-1 CDF-152 Page 158 DETECTOR COMPONENT BANKS Notes: 1. Block 0 -- Found Track attributes: 1. Word 0 -- Number of Found tracks Bits Contents ---- -------- 00:07 Number of tracks (0-255) reconstructed by linker 08:31 Unused 2. Words 1,3,...,2*NTRK-1 -- Track Attributes Bits Contents ---- -------- 00:04 Pt bin (1-31) 05:12 Z (min-max) 13 Unused 14:16 Engine number (0-5) 17:18 Peakcontrol (0-3) 19:31 Unused 3. Words 2,4,...,2*NTRK -- I.D. of segments associated with this track Bits Contents ---- -------- 00:08 Local azimuth (SL8) 09:13 Cell number within an engine (SL8) (0-21) 14:15 Unused 16:24 Local azimuth (SL6) 25:29 Cell number within an engine (SL6) (0-21) 30:31 Unused 2. Pt of the track is 31 bins and bin 16 is infinite momentum. Bins 1-15 are negatively charged track, bins 17-31 are positively charged tracks. The exact momentum corresponding to each bin is Run dependent, and is stored as part of the Run Conditions Bank. 3. The Z coordinate field is reserved for later use - not implemented. 4. Peakcontrol bits in the track attributes block designate which of the associated segment I.D. words (or both) are valid for this track. The bits (11) mean both are valid, the bits (10) mean only the SL8 word is valid, and the bits (01) mean only the SL6 word is valid. By defineition, we should not even store a track if neither is valid (00). CDF-152 Page 159 DETECTOR COMPONENT BANKS 5. Azimuth is defined relative to the center of the super cell in SL8 (by convention, with sense wires numbered from 0-11, the center is defined to be the field wire between sense wires 5 and 6). Units of azimuth are 0.8 milliradians. The eight azimuth bits are allocated differently for each super layer - we have not completely defined the bit allocation yet. 6. Engines are numbered 0-5 in order of increasing phi, with engine number 0 starting at phi = 0 and extending to phi = pi/3. Each engine represents a "pie slice" of the CTC. 7. Cell number is defined within an Engine. 8. Blocks 1 through 5 -- Track segments: 1. Word 0 -- Number of segments found by FIFO Bits Contents ---- -------- 00:10 Number of segments in this SL (0-1535) 11:31 Unused 2. Words 1,2,...,NSEG -- Segment data Bits Contents ---- -------- 00:08 Local azimuth 09:13 Cell number (0-21) 14:16 Engine number (0-5) 17:31 Unused 9. Minimum (Maximum) bank length = 14 (8206) I*4 words. CDF-152 Page 160 DETECTOR COMPONENT BANKS 7.47 TBMD Bank - Block Mover Bank This bank contains the contents of the block mover boards. There is one block mover card per RAW/CAS crate. The block movers store information which gives which summer was used for each cluster (including the "normal" L1 clustering pass) and the data from this sum register from each RAW/CAS pair in the crate. ____ _______ Bank History 08-Nov-1991 B. Badgett + SCE Original Creation The TBMD bank header values are: Bank Name : "TBMD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TBMD bank format is: Displacement (I*4) Contents Description 0 10 No. of Blocks 1 P0 Pointer to block 0, FEM West RAW/CAS Crate 2 P1 Pointer to block 1, FHA West RAW/CAS Crate 3 P2 Pointer to block 2, PEM West RAW/CAS Crate 4 P3 Pointer to block 3, PHA West RAW/CAS Crate 5 P4 Pointer to block 4, CEM RAW/CAS Crate 6 P5 Pointer to block 5, CHA RAW/CAS Crate 7 P6 Pointer to block 6, PEM East RAW/CAS Crate 8 P7 Pointer to block 7, PHA East RAW/CAS Crate 9 P8 Pointer to block 8, FEM East RAW/CAS Crate 10 P9 Pointer to block 9, FHA East RAW/CAS Crate 11 P10 End of Data Pointer -------------------------------------------------------------------- Data for Block 0, FEM West Block Mover -------------------------------------------------------------------- P0 FEM West Block mover register CSR C0000010 P0+1 FEM West Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 FEM West Block Mover Register CSR C000010+(N-1)*B + A -------------------------------------------------------------------- Data for Block 1, FHA West Block Mover -------------------------------------------------------------------- P0 FHA West Block mover register CSR C0000010 CDF-152 Page 161 DETECTOR COMPONENT BANKS P0+1 FHA West Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 FHA West Block Mover Register CSR C000010+(N-1)*B + A -------------------------------------------------------------------- Data for Block 2, PEM West Block Mover -------------------------------------------------------------------- P0 PEM West Block mover register CSR C0000010 P0+1 PEM West Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+7 PEM West Block Mover Register CSR C000010+(N-1)*8 + 7 -------------------------------------------------------------------- Data for Block 3, PHA West Block Mover -------------------------------------------------------------------- P0 PHA West Block mover register CSR C0000010 P0+1 PHA West Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+7 PHA West Block Mover Register CSR C000010+(N-1)*8 + 7 -------------------------------------------------------------------- Data for Block 4, CEM Block Mover -------------------------------------------------------------------- P0 CEM Block mover register CSR C0000010 P0+1 CEM Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 CEM Block Mover Register CSR C000010+(N-1)*B + A -------------------------------------------------------------------- Data for Block 5, CHA East Block Mover -------------------------------------------------------------------- P0 CHA Block mover register CSR C0000010 P0+1 CHA Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 CHA West Block Mover Register CSR C000010+(N-1)*B + A -------------------------------------------------------------------- Data for Block 6, PEM East Block Mover -------------------------------------------------------------------- P0 PEM East Block mover register CSR C0000010 P0+1 PEM East Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . CDF-152 Page 162 DETECTOR COMPONENT BANKS P0+(N-1)*K+7 PEM east Block Mover Register CSR C000010+(N-1)*8 + 7 -------------------------------------------------------------------- Data for Block 7, PHA East Block Mover -------------------------------------------------------------------- P0 PHA East Block mover register CSR C0000010 P0+1 PHA East Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+7 PHA east Block Mover Register CSR C000010+(N-1)*8 + 7 -------------------------------------------------------------------- Data for Block 8, FEM East Block Mover -------------------------------------------------------------------- P0 FEM East Block mover register CSR C0000010 P0+1 FEM East Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 FEM east Block Mover Register CSR C000010+(N-1)*B + A -------------------------------------------------------------------- Data for Block 9, FHA East Block Mover -------------------------------------------------------------------- P0 FHA East Block mover register CSR C0000010 P0+1 FHA East Block mover register CSR C0000011 . . . . . . . . . . . . . . . . . . . . . P0+(N-1)*K+10 FHA east Block Mover Register CSR C000010+(N-1)*B + A Notes: 1. N stands for # clusters (including those from the "normal" L1 clustering pass) stored in block mover memory. CSR 12 of the block mover board contains N*K, where K=11 for the forward and central and K=8 for the plug, unless there is a fastbus error reading the crate sum. If there is a fastbus error reading the crate sum, K=1. 2. Unless a FASTBUS error occurs, CSR C0000010 is a copy of Crate Sum Register CSR C0000000. Bits <10:9> give which CAS sum register was used (A=0,B=1,C=2,D=3). Bit 31 will be 0. This word also contains other control bits, described in Trigger Note #43, "Description of the Crate Sum Boards". If a FASTBUS error occurs, bit 31 will be 1, and this word will contain bits Length(bits) Description ==== ============ =========== (16:0) 17 Encoded Fastbus Error status bits Length(bits) Description ==== ============ =========== (7:0) 8 block mover sequencer address at time of error CDF-152 Page 163 DETECTOR COMPONENT BANKS 8 1 crate segment AK timeout 9 1 crate segment DK timeout 10 1 cable segment AK timeout (not applicable) 11 1 cable segment DK timeout (not applicable) 12 1 long timeout occurred (15:13) 3 fastbus SS status when error occured 31 1 fastbus error flag (=1) 3. Registers CSR C0000011 - C00001A (C000017 for plug) give the contents of that sum register for the CAS in slots 4,6,8,...,16 (10 for plug). 4. There is one copy of (2) and (3) for each of the N clusters unless a FASTBUS error occurs when reading Crate Sum. In this case, there is only a copy of (2). CDF-152 Page 164 DETECTOR COMPONENT BANKS 7.48 CFWD Bank - CTC Fast Track Finder Track Data Bank The CFWD bank contains the list of tracks found by the Freeman/Foster CTC Fast Track Processor (CFT). The list is ordered by ascending wire number (increasing CDF phi) in the CFT wire number format. For each track found, the data recorded are: Wire Number, CFT PT Bin ( 0 through 7 ) and Track Sign (+ or -). In the equivalent simulation bank, CFWS, also included are the delta-phi bin and Majority Logic of the Track. For Run Ia and beyond, there exists a compressed version called CFWQ (no CFWD data is lost in compression). ____ _______ Bank History 1987 Original Wire-list per Clock Cyclce Format, see below 30-Aug-1993 WFB Update format description for 1988/89 and 1992/93 Runs This Bank has the following Bank Header Characteristics:- Bank Name : "CFWD" Bank Number : 1 Raw Data Bank 4 De-compressed CFWQ Bank Bank Type : BNKTI4 (Integer*4) Compressed Bank : CFWQ,1 (for 1992 and beyond PADS) Equivalent Simulation Bank : CFWS,1 The 1988/89 and 1992/93 CFWD Bank Format is: Displacement (I*4) Contents Decsription ------------ -------- ----------- 0 1 Number of Blocks 1 P0 = 3 Pointer to Block 0 2 P1 = N+3 Pointer to End of Data P0+0 Track Data, Track # 1 ... P0+(N-1) Track Data, Track # N Where N = Number of Tracks Found by CFT, up to a maximum of 64 The format of the Track Data is: Bits <31:19> Not used, blank <18> Delta-phi bin (Simulation bank CFWS only, always 0 in CFWD) <17:16> Majority Logic, 0 , 1 or 2 Misses (Simulation Only) <15> Track Data Valid (1=Yes) <14:11> Transverse Momemtum Code <14:12> Absolute Bin Number, 0 - 7 <11> Sign of the Track, 1=Negative, 0=Positive <10:0> CFT Wire Number, 0 - 2047 CDF-152 Page 165 DETECTOR COMPONENT BANKS <10:7> CTC TDC Module Number, 1 - 15 <6:0> Channel Number within TDC, 0 - 95 The PT Bins Correspond to nominal PT Values (used in mask creation) of: 0 - 7: 3.3, 4.0, 5.0, 6.5, 10.0, 15.0, 20.0, 30.0 GeV These were the values used in the 1988/89 and 1992/93 runs. They may be changed in the future. They have a measured 90% efficiency points of: 0 - 7: 3.0, 3.7, 4.8, 6.0, 9.2, 13.0, 16.7, 25.0 GeV These 90% Efficiency points can and do change with running conditions. The 1987 CFWD bank format is: This bank holds the list of wire numbers processed by the CTC Fast Track Processsor "Master Card" on each clock cycle. This is diagnostic information and may eventually be dropped from the readout. .b; This Bank has the following Bank Header Characteristics:- .lt Bank Name : "CFWD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CFWD bank format is: Displacement (I*4) Contents Description -------- -------- ----------- 0 1 Number of blocks 1 3 Pointer to data for 1st block 2 Pointer to end-of-data +1 3 Single 32-bit word containing the Wire #s processed on 1st and 2nd clock cycles. 4 Single 32-bit word containing the Wire #s processed on 3rd and 4th clock cycles. 5 etc. . . . . . . (last entry) Single 32 bit word in which one of the fields is a terminator word of 07FF (hex). If no such word is at the end of the list, then the maximum size of the wire # list was reached without seeing this terminator entry from the hardware. ______ NOTES: CDF-152 Page 166 DETECTOR COMPONENT BANKS 1. Each data word has two 11-bit fields as follows: Bits Contents ---- -------- 0:10 Wire # processed on clock cycle N (1st, 3rd, 5th, etc.) 11:15 unused - bits are zero. 16:26 Wire # processed on clock cycle N+1 (2nd, 4th, 6th, etc.) 27:31 unused - bits are zero. 2. The minimum number of longwords of data is 8 and the maximum is 721. 3. The maximum bank length is: (3 header words) + (1440 wires in CTC superlayer 8) / (2 wire numbers per word) + (at most 1 terminator word) = 724 I*4 words. CDF-152 Page 167 DETECTOR COMPONENT BANKS 7.49 CPMD Bank - CENTRAL PENN TRACK Ram Dump Bank This bank is a structure to store the data read out of the front end rams on the CPT Time Memory boards. The main purpose of this is for debugging and for monitoring the validity of the data input to the Track Processor. The CPMD bank header values are: Bank Name : "CPMD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CPMD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 5 Number of blocks 1 P0=7 Pointer to block 0, SL8 Time Memory data 2 P1=P0+480 Pointer to block 0, SL6 Time Memory data 3 P2=P1+384 Pointer to block 0, SL4 Time Memory data 4 P3=P2+288 Pointer to block 0, SL2 Time Memory data 5 P4=P3+192 Pointer to block 0, SL0 Time Memory data 6 1479 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Time Memory ram data, SL8 -------------------------------------------------------------- P0 Low order 32 bits for TM board 32 address 0 P0+1 High order 32 bits for TM board 32 address 0 P0+2 Low order 32 bits for TM board 32 address 1 P0+3 High order 32 bits for TM board 32 address 1 . . P0+30 Low order 32 bits for TM board 32 address 15 P0+31 High order 32 bits for TM board 32 address 15 . . . . . . P0+478 Low order 32 bits for TM board 46 address 15 P0+479 High order 32 bits for TM board 46 address 15 CDF-152 Page 168 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 1, Time Memory ram data, SL6 -------------------------------------------------------------- P1 Low order 32 bits for TM board 20 address 0 P1+1 High order 32 bits for TM board 20 address 0 P1+2 Low order 32 bits for TM board 20 address 1 P1+3 High order 32 bits for TM board 20 address 1 . . P1+30 Low order 32 bits for TM board 20 address 15 P1+31 High order 32 bits for TM board 20 address 15 . . . . . . P1+382 Low order 32 bits for TM board 31 address 15 P1+383 High order 32 bits for TM board 31 address 15 -------------------------------------------------------------- Data for Block 2, Time Memory ram data, SL4 -------------------------------------------------------------- P2 Low order 32 bits for TM board 32 address 0 P2+1 High order 32 bits for TM board 32 address 0 P2+2 Low order 32 bits for TM board 32 address 1 P2+3 High order 32 bits for TM board 32 address 1 . . P2+30 Low order 32 bits for TM board 32 address 15 P2+31 High order 32 bits for TM board 32 address 15 . . . . . . P2+286 Low order 32 bits for TM board 46 address 15 P2+287 High order 32 bits for TM board 46 address 15 CDF-152 Page 169 DETECTOR COMPONENT BANKS -------------------------------------------------------------- Data for Block 3, Time Memory ram data, SL2 -------------------------------------------------------------- P3 Low order 32 bits for TM board 5 address 0 P3+1 High order 32 bits for TM board 5 address 0 P3+2 Low order 32 bits for TM board 5 address 1 P3+3 High order 32 bits for TM board 5 address 1 . . P3+30 Low order 32 bits for TM board 5 address 15 P3+31 High order 32 bits for TM board 5 address 15 . . . . . . P3+190 Low order 32 bits for TM board 10 address 15 P3+191 High order 32 bits for TM board 10 address 15 -------------------------------------------------------------- Data for Block 4, Time Memory ram data, SL0 -------------------------------------------------------------- P4 Low order 32 bits for TM board 1 address 0 P4+1 High order 32 bits for TM board 1 address 0 P4+2 Low order 32 bits for TM board 1 address 1 P4+3 High order 32 bits for TM board 1 address 1 . . P4+30 Low order 32 bits for TM board 1 address 15 P4+31 High order 32 bits for TM board 1 address 15 . . . . . . P4+126 Low order 32 bits for TM board 4 address 15 P4+127 High order 32 bits for TM board 4 address 15 CDF-152 Page 170 DETECTOR COMPONENT BANKS Notes: 1. Blocks 0-4 -- Time Memory Ram Data for Axial Super Layers 8-0 1. Word 0 -- TM Data- low order 32 bits Bits Contents ---- -------- 00:07 Wire 0 time hit cells 1-8 (0-255) 08:15 Wire 1 time hit cells 1-8 (0-255) 16:23 Wire 2 time hit cells 1-8 (0-255) 24:31 Wire 3 time hit cells 1-8 (0-255) 2. Word 1 -- TM Data- high order 32 bits Bits Contents ---- -------- 00:07 Wire 4 time hit cells 1-8 (0-255) 08:15 Wire 5 time hit cells 1-8 (0-255) 16:23 Wire 6 time hit cells 1-8 (0-255) 24:31 Wire 7 time hit cells 1-8 (0-255) 2. Minimum (Maximum) bank length = 1479 (1479) I*4 words. CDF-152 Page 171 DETECTOR COMPONENT BANKS 7.50 TTLD Bank - Level 2 Track List Bank This bank contains the contents of the Track List Board. ____ _______ Bank History 11-Nov-1991 SCE Original Creation 28-May-1992 WFB Revision before DAQ implementation 6-Oct-1992 WFB Corrections in CMX chamber hit description Clarification of CFT track format. The TTLD bank header values are: Bank Name : "TTLD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TTLD bank format is: Displacement (I*4) Contents Description 0 3 No. of Blocks 1 P0 Pointer to block 0, summary 2 P1 Pointer to block 1, muon hits 3 P2 Pointer to block 2, track list 4 P3 End of Data Pointer -------------------------------------------------------------------- Data for Block 0, Summary Block -------------------------------------------------------------------- Offset Bits Fastbus Address Description ------ ---- --------------- ----------- P0 <0:31> CSR C0000000 Track/Muon/Electron Summary Information The format for CSR C0000000 is bits Length(bits) Description ==== ============ =========== <7:0> 8 Number of tracks in track list <19:16> 4 Number of CMP gold muons <23:20> 4 Number of CMX gold muons <27:24> 4 Number of CES gold electrons <31:28> 4 Number of CPR gold electrons ------------------------------------------------------------------- Data for Block 1, Muon Trigger Hits ------------------------------------------------------------------- Offset Bits Fastbus Address Description ------ ---- --------------- ----------- P1 <0:23> CSR C0000005 CMU Hits, East Chambers: 0-23 CDF-152 Page 172 DETECTOR COMPONENT BANKS P1+1 <0:23> CSR C0000006 CMU Hits, East Chambers: 24-47 P1+2 <0:23> CSR C0000007 CMU Hits, East Chambers: 48-71 P1+3 <0:23> CSR C0000008 CMU Hits, West Chambers: 0-23 P1+4 <0:23> CSR C0000009 CMU Hits, West Chambers: 24-47 P1+5 <0:23> CSR C000000A CMU Hits, West Chambers: 48-71 P1+6 <0:23> CSR C000000B CMUP Hits Mapping to CMU Chambers 0-23 P1+7 <0:23> CSR C000000C CMUP Hits Mapping to CMU Chambers 24-47 P1+8 <0:23> CSR C000000D CMUP Hits Mapping to CMU Chambers 48-71 P1+9 <0:23> CSR C000000E CMX Hits, East Chambers: 69-71,0-20 P1+10 <0:23> CSR C000000F CMX Hits, East Chambers: 21-50 P1+11 <0:23> CSR C0000010 CMX Hits, East Chambers: 51-68 P1+12 <0:23> CSR C0000011 CMX Hits, West Chambers: 69-71,0-20 P1+13 <0:23> CSR C0000012 CMX Hits, West Chambers: 21-50 P1+14 <0:23> CSR C0000013 CMX Hits, West Chambers: 51-68 Caveat: Note how the chamber numbers for CMX are shifted by three with respect to the bit number. For each detector, the chamber hits listed in the description start from the least signficant bit in the bank. ------------------------------------------------------------------- Data for Block 2, Track List ------------------------------------------------------------------- Offset Bits Fastbus Address Description ------ ---- --------------- ----------- P2 <0:26> CSR C0000017 CTC Track and Match Data, Track #1 P2+1 <0:26> CSR C0000018 CTC Track and Match Data, Track #2 . . . . P2+N-1 <0:26> CSR C0000017+N-1 CTC Track and Match Data, Track #N where N is the number of tracks in the track list, given by bits <7:0> of CSR C0000000. (Maximum: N=233) The tracks are sent to the Level 2 Track List card via the CTCX and CTCF modules. During the 1992 Run 1A, initially the tracks will be provided by the CFT Tracker. If at some point during the run the CPT Tracker replaces the CFT in the Level 2 Trigger system, then the Track List will receive CPT tracks instead. Indeed, the Track List Board was built with the intention of working with the CPT to take advantage of its improved performance over the CFT. (The CFT and CPT both interface with the CTCX/CTCF modules.) For the CFT, the format of the phi is encoded: <10:7> CTC TDC module number, 1-15 <6:0> Channel number within TDC, 0-95 The Momentum (PT) is encoded: <3:1> Momentum bin number, 0-7 <0> Sign of the track (1=-,0=+) (Caveat: The ordering of the PT encoded bits is not the same as in the banks TCSD or TL2D.) CDF-152 Page 173 DETECTOR COMPONENT BANKS For the CPT, the format of phi has not yet been finalized, but is expected to be in units of milliradians. The format of the Track Word is: bits length(bits) Description ==== ============ =========== <10:0> 11 CTC wire adress (phi) <14:11> 4 Momentum (Pt) <18:15> 4 Central gold muon bits=(CMU+(CMP if required)) <15> East Low <16> East High <17> West Low <18> West High <22:19> 4 Central Extension gold muon bits <19> East Low <20> East High <21> West Low <22> West High <24:23> 2 CES gold electron <23> East <24> West <26:25> 2 CPR gold electron <25> East <26> West CDF-152 Page 174 DETECTOR COMPONENT BANKS 7.51 LULD Bank - Telescope Counters Latch Data Bank This bank contains the raw data for 1 Struck 32-channel latch. This Bank has the following Bank Header Characteristics:- Bank Name : "LULD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 1 No. of Blocks 1 3 1st Latch Block Pointer 2 5 End of Data Pointer 3 BBC Latch (see notes) 4 BBC Latch (see notes) 1. No. of Blocks. There is 1 Block, corresponding to the 1 Latch Module. 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers (being set to 2 for this bank). 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. This Bank is fixed length. 5. The telescope Latch is organised in the following manner:- Bits 0-11 : East 0-11 Bits 12-23 : West 0-11 Bits 24-27 : East 0-4 Bits 28-31 : West 0-4 CDF-152 Page 175 DETECTOR COMPONENT BANKS 7.52 SVXD Bank - Silicon Vertex Detector Raw Data Bank This format describes the SVXD bank, which contains raw data from the SVX Detector. It is defined to be used with the FastBus based readout electronics A typical readout configuration assumes 1 Scanner (SSP) and 1 Sequencer sitting in one FB crate. Seq 1 will scan six wedges on the Top West side of the SVX detector, Seq 2 - Bottom West, Seq 3 - Top East, and Seq 4 - Bottom East. The data is divided into sequencers (0-3), and subdivided into wedges (0-23). This Bank has the following Bank Header Characteristics:- Bank Name : "SVXD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Type Displacement Contents Description -------------------------------------------------------------------------------- I*4 0 NBLOCK=28 Number of Blocks .......... Sequencer 0 ........... I*4 1 IPSEQ0 Offset to Sequencer 0 Description Block (Block 0) I*4 2 IPWD00 Offset to Wedge 0 (West side, number 0) (Block 1) I*4 3 IPWD01 Offset to Wedge 1 (West side, number 1) (Block 2) I*4 4 IPWD02 Offset to Wedge 2 (West side, number 2) (Block 3) I*4 5 IPWD03 Offset to Wedge 3 (West side, number 3) (Block 4) I*4 6 IPWD04 Offset to Wedge 4 (West side, number 4) (Block 5) I*4 7 IPWD05 Offset to Wedge 5 (West side, number 5) (Block 6) .......... Sequencer 1 ........... I*4 8 IPSEQ1 Offset to Sequencer 1 Description Block (Block 7) I*4 9 IPWD06 Offset to Wedge 6 (West side, number 6) (Block 8) I*4 10 IPWD07 Offset to Wedge 7 (West side, number 7) (Block 9) I*4 11 IPWD08 Offset to Wedge 8 (West side, number 8) (Block 10) I*4 12 IPWD09 Offset to Wedge 9 (West side, number 9) (Block 11) I*4 13 IPWD10 Offset to Wedge 10 (West side, number 10) (Block 12) I*4 14 IPWD11 Offset to Wedge 11 (West side, number 11) (Block 13) .......... Sequencer 2 ........... I*4 15 IPSEQ2 Offset to Sequencer 2 Description Block (Block 14) I*4 16 IPWD12 Offset to Wedge 12 (East side, number 0) (Block 15) I*4 17 IPWD13 Offset to Wedge 13 (East side, number 1) (Block 16) I*4 18 IPWD14 Offset to Wedge 14 (East side, number 2) (Block 17) I*4 19 IPWD15 Offset to Wedge 15 (East side, number 3) (Block 18) I*4 20 IPWD16 Offset to Wedge 16 (East side, number 4) (Block 19) I*4 21 IPWD17 Offset to Wedge 17 (East side, number 5) (Block 20) .......... Sequencer 3 ........... I*4 22 IPSEQ3 Offset to Sequencer 3 Description Block (Block 21) I*4 23 IPWD18 Offset to Wedge 18 (East side, number 6) (Block 22) CDF-152 Page 176 DETECTOR COMPONENT BANKS I*4 24 IPWD19 Offset to Wedge 19 (East side, number 7) (Block 23) I*4 25 IPWD20 Offset to Wedge 20 (East side, number 8) (Block 24) I*4 26 IPWD21 Offset to Wedge 21 (East side, number 9) (Block 25) I*4 27 IPWD22 Offset to Wedge 22 (East side, number 10) (Block 26) I*4 28 IPWD23 Offset to Wedge 23 (East side, number 11) (Block 27) I*4 29 Offset to the Last Data Word + 1 ================================================================================ There are a total of four Sequencer Description Blocks, located in blocks 0, 7, 14, and 21. Each of the blocks describes the data for one sequencer. Sequencers are numbered from i=0 to 3. The wedges in Sequencer i are numbered j+(i*6), where j=0,5. The End-of-Buffer Register contains the address of the last location in the Sequencer's Event Memory to which a data word was written. In order to get the number of data words in a given wedge you must add 1 to the content of this register. Sequencer Description Blocks Format: Type Displacement Contents Description -------------------------------------------------------------------------------- Blocks 0,7,14,21 -------------------------------------------------------------------------------- I*4 IPSEQi LWEDGEj End-of-Buffer Register for Wedge j, Sequencer i I*4 IPSEQi+1 LWEDGEj+1 End-of-Buffer Register for Wedge j+1, Sequencer i ... ........ ........ I*4 IPSEQi+5 LWEDGEj+5 End-of-Buffer Register for Wedge j+5, Sequencer i I*4 IPSEQi+6 End-of-Buffer Register for Block 6 I*4 IPSEQi+7 End-of-Buffer Register for Block 7 I*4 IPSEQi+8 Execution Timer (C000-0008) I*4 IPSEQi+9 SVX Status (C000-0009) I*4 IPSEQi+10 Wedge Priority (C000-000A) I*4 IPSEQi+11 Wedge Priority Mask (C000-000B) I*4 IPSEQi+12 External Conditions (C000-000C) I*4 IPSEQi+13 Instruction Execution Monitor (C000-000D) I*4 IPSEQi+14 ICIPi Controller ID Register for Sequencer i I*4 IPSEQi+15 ICEPi Controller Error Register for Sequencer i I*4 IPSEQi+16 ICPPi Controller Priority Mask Register for Sequencer i I*4 IPSEQi+17 ICDPi Controller Diagnostic Register for Sequencer i ================================================================================ There are a total of 24 Wedge Data Blocks, located in blocks 1-6, 8-13, 15-20, and 22-27. Each of the blocks describes the data for one wedge. Preceeding the Channel Data Words are SVXDCN Wedge Control Words (see note 4). the current version of SVXD uses SVXDCN=14. Wedge Data Blocks Format: Type Displacement Contents (lower 16 bits) CDF-152 Page 177 DETECTOR COMPONENT BANKS Description -------------------------------------------------------------------------------- Blocks 1 to 27 (excluding blocks 0, 7, 14, and 21) -------------------------------------------------------------------------------- I*4 IPWDnn 0000x Fixed Control Word for wedge nn I*4 IPWDnn+1 AAAAx Fixed Control Word for wedge nn I*4 IPWDnn+2 5555x Fixed Control Word for wedge nn I*4 FFFFx Fixed Control Word for wedge nn I*4 VCAL1 Charge injection DAC 1 I*4 VCAL2 Charge Injection DAC 2 I*4 OFFDAC Offset DAC I*4 CSR1 Digitizer settings, eg. gain I*4 DigGPR General Purpose register I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 IPWDnn+13 DESR Digitizer Error Status Register I*4 IPWDnn+SVXDCN The first Channel Data Word for wedge nn ... ...... ................................... I*4 IPWDnn+LWEDGEnn The last Channel Data Word for wedge nn -------------------------------------------------------------------------------- ================================================================================ Notes: -------------------------------------------------------------------------------- 1. All words are I*4 type. -------------------------------------------------------------------------------- 2. IPWDnn, the offset to the Wedge Data Block for wedge nn, points to the first word in the block (a Fixed Control Word), not to the first Channel Data Word. -------------------------------------------------------------------------------- 3. Channel Data Words are 32 bit words composed of the following fields: LSB: Bits 0-11 12 Bit ADC value Bits 12-15 Not used Bits 16-22 CAD = Channel Address of the readout chip (0-127) Bits 23-26 CID = Readout Chip ID in daisy chain (0-14) Bits 27-29 N = Digitizer Number (ADC Module number) (0-5) MSB: Bits 30-31 C = Crate/Controller Number (0-3) bit |3 3| | | 2 | | 1 | # |1 0|9 8 7|6 5 4 3|2 1 0 9 8 7 6|5 4 3 2|1 0 9 8 7 6 5 4 3 2 1 0| ------+---+-----+-------+-------------+-------+-----------------------+ | | | | | not | | value | C | N | CID | CAD | used | ADC DATA | Bits 16-31 form the channel Logical ID (LID), which uniquely specifies each channel within the SVX. There are a total of 46080 valid LID's. An example of an invalid LID is when the Chip ID is set to 15. In this case, the CDF-152 Page 178 DETECTOR COMPONENT BANKS word is a Wedge Control Word, not an actual Channel Data Word. -------------------------------------------------------------------------------- 4. The beginning of each Wedge Data Block contains SVXDCN Wedge Control Words from the Digitizer's internal registers. SVXDCN is stored as a parameter in C$INC:??????.INC (doesn't exist). Its value corresponds to the number of control words at the beginning of each Wedge Data Block. Four Fixed Control Words are used for diagnostics, and six Control Words are used for calibration. As of Dec 14, 1991: SVXDCN=14. Before Dec 14, 1991: SVXDCN=12. Wedge Control Words are 32 bit words composed of the following fields: LSB: Bits 0-15 data for this subaddress Bits 16-19 A = subaddress Bits 20-22 IDB = control word ID bits Bits 23-26 CID = Fake Readout Chip ID in daisy chain = 15 Bits 27-29 N = Digitizer Number (ADC Module number) (0-5) MSB: Bits 30-31 C = Crate/Controller Number (0-3) bit |3 3| | | 2| | 1 | # |1 0|9 8 7|6 5 4 3|2 1 0|9 8 7 6|5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0| ------+---+-----+-------+-----+-------+-------------------------------+ | | | CID | | | | value | C | N |1 1 1 1| IDB | A | data | NOTE: Bits 23-26 are always on for Wedge Control Words, corresponding to a Fake Chip ID of 15. -------------------------------------------------------------------------------- 5. Some SVXD banks could contain the SVX Pattern Register Words instead of actual data. In this case, the first four words in each Wedge Data Block (the Fixed Control Word for each wedge) will contain [FFFFx, 5555x, AAAAx, 0000x] in the lower 16 bits instead of [0000x, AAAAx, 5555x, FFFFx]. Instead of Channel Data Words, the Wedge Data Blocks will then contain the following HiLo Control Words: Type Displacement Contents -------------------------------------------------------------------------------- I*4 IPWDnn+SVXDCN SVX register A8 for HiLo High for chip 00 of wedge nn SVX register A9 for HiLo High for chip 00 of wedge nn SVX register A8 for HiLo Low for chip 00 of wedge nn SVX register A9 for HiLo Low for chip 00 of wedge nn SVX register A8 for HiLo Low for chip 01 of wedge nn ..... SVX register A9 for HiLo Low for chip 14 of wedge nn HiLo Control Words are 32 bit words, in the same format as Wedge Control Words. The data sections (lower 16 bits) of the HiLo Control Words have the following format: CDF-152 Page 179 DETECTOR COMPONENT BANKS bit | 1 1 | | | | # | 5 4 3 2 1 0 9 8 7 | 6 | 5 4 | 3 2 1 0| ------+-----------------------------------+---+-------+--------------+ A8 Hi | | | | | value |CNV SCA SCI 0 TC1 HL1 WE1 RE1 NM |TM | 0 0 | line status | | | | | | A9 Hi | | | | | value | 0 0 0 0 0 0 0 PR NM |TM | 0 0 | CID | | | | A8 Lo | | | value |CNV SCA SCI 0 TC1 HL1 WE1 RE1 LA | 0 0 0 0 0 0 0 | | | | A9 Lo | | | value | 0 0 0 0 0 0 0 PR LA | 0 0 0 0 0 0 0 | CID = Readout Chip ID in daisy chain (0-14) TM = Threshold Mode: 1=positive, 0=negative NM = Neighbor Mode: 1=nbr logic, 0=no nbr logic RE1 = 0 WE1 = 1 HL1 = HiLo cycle: 1=Hi, 0=Lo TC1 = 0 SCI = 0 SCA = 0 CNV = 0 There are four HiLo Control Words for each chip in a given wedge, for a total of sixty HiLo Control Words per wedge. -------------------------------------------------------------------------------- 6. Controller Register Words are 32 bit words, in the same format as Wedge Control Words. CDF-152 Page 180 DETECTOR COMPONENT BANKS 7.53 VTRD Bank - VTPC Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the VTPC ____ _______ Bank History 19-Nov-1987 JP Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "VTRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The VTRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 8 Number of blocks (phi-slices) 1 P0 Pointer to block 0, data for phi-slice 0 2 P1 Pointer to block 1, data for phi-slice 1 . . . . . . . . 8 P7 Pointer to block 7, data for phi-slice 7 9 P8 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (phi-slice 0) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in phi-slice 0 (=8) P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block -------------------------------------------------------------- Data for Block 1, (phi-slice 1) -------------------------------------------------------------- P1 NTDC2 Number of TDCs x 2 in phi-slice 1 (=8) P1+1 TL0 Pointer to leading edge data from TDC 0 P1+2 TT0 Pointer to trailing edge data from TDC 0 P1+3 TL1 Pointer to leading edge data from TDC 1 P1+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P1+NTDC2+1 Pointer to first word of next block . . etc. CDF-152 Page 181 DETECTOR COMPONENT BANKS The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... Notes: 1. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 2. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (2 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 3. The VTPC phi-slices each contain 4 TDCs for a total of 32 TDCs. 4. VTPC reformatted TDC data is saved in bank VTWD. 5. Minimum bank length = 90 I*4 words. CDF-152 Page 182 DETECTOR COMPONENT BANKS 7.54 CTRD Bank - CTC Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the CTC ____ _______ Bank History 19-Nov-1987 JP Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "CTRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CTRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 9 Number of blocks (superlayers) 1 P0 Pointer to block 0, data for superlayer 0 2 P1 Pointer to block 1, data for superlayer 1 . . . . . . . . 9 P8 Pointer to block 8, data for superlayer 8 10 P9 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (superlayer 0) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in superlayer 0 P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block -------------------------------------------------------------- Data for Block 1, (superlayer 1) -------------------------------------------------------------- P1 NTDC2 Number of TDCs x 2 in superlayer 1 P1+1 TL0 Pointer to leading edge data from TDC 0 P1+2 TT0 Pointer to trailing edge data from TDC 0 P1+3 TL1 Pointer to leading edge data from TDC 1 P1+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P1+NTDC2+1 Pointer to first word of next block . . etc. CDF-152 Page 183 DETECTOR COMPONENT BANKS The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... Notes: 1. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 2. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (2 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 3. The CTC superlayers 0-8 contain respectively 4, 3, 6, 4, 9, 6, 12, 7, 15 TDCs for a total of 66 TDCs. 4. CTC reformatted TDC data is saved in bank CTCD. 5. Minimum bank length = 161 I*4 words. CDF-152 Page 184 DETECTOR COMPONENT BANKS 7.55 TUPD Bank - Level One Trigger Central Muon Upgrade Detector Bank This bank pertains to the contents of the Central Muon Upgrade Level One Trigger Cards (MP1T). These boards use muon drift chamber hits to make a prediction via a look-up table as to the possible 5-degree units in Phi (in the Central Muon system) the muon(s) could have come from. This prediction is ultimately compared to Central Muon 5-degree unit hits. Each MP1T card's crate location is adjacent to a 96-channel TDC. The 96 TDC signals act as inputs to 8 memories on each MP1T board. Each memory has a minimum Pt look-up table downloaded into it, and has 4 outputs which correspond to 4 units of the 72 5-degree units in Phi. Thus, specific patterns will cause one or more of these bits (there are 8x4 = 32 bits per card) to turn on. Each MP1T card's 32-bit output is stored in the TUPD bank. The 32-bit outputs get merged into 11 bits. Hence, each MP1T card can at most span 55-degrees in Phi. These 11-bits get mapped and ORed on the auxiliary backplane to the 72-bit bus which runs along it, in such a way as to optimize trigger performance. This 72-bit prediction, which can be read from any of the MP1T cards in the last crate, is also stored in the CDF-152 Page 185 DETECTOR COMPONENT BANKS TUPD bank. ____ _______ Bank History 04-Dec-1991 M. Krasberg Original Creation 19-Jan-1991 S. Hong Change order of 72-bit bus CSR registers so raw data is easier to understand The TUPD bank header values are: Bank Name : "TUPD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TUPD bank format is: Displacement (I*4) Contents Description 0 3 No. of Blocks 1 P0 Pointer to block 0, MP1T 00-06, 32-bit outputs 2 P1 Pointer to block 1, MP1T 07-12, 32-bit outputs 3 P2 Pointer to block 2, 72-bit bus on Bottom Crate 4 P3 End of Data Pointer -------------------------------------------------------------------- Data for Block 0, MP1T Top Crate (rack 18I) -------------------------------------------------------------------- P0 MP1T_00 register CSR C0000003 (Top) P0+ 1 MP1T_01 register CSR C0000003 (Top) P0+ 2 MP1T_02 register CSR C0000003 (Top) P0+ 3 MP1T_03 register CSR C0000003 (Top) P0+ 4 MP1T_04 register CSR C0000003 (Top) P0+ 5 MP1T_05 register CSR C0000003 (Top) P0+ 6 MP1T_06 register CSR C0000003 (Top) -------------------------------------------------------------------- Data for Block 1, MP1T Bottom Crate (rack 18I) -------------------------------------------------------------------- P1 MP1T_07 register CSR C0000003 (Bottom) P1+ 1 MP1T_08 register CSR C0000003 (Bottom) P1+ 2 MP1T_09 register CSR C0000003 (Bottom) P1+ 3 MP1T_10 register CSR C0000003 (Bottom) P1+ 4 MP1T_11 register CSR C0000003 (Bottom) P1+ 5 MP1T_12 register CSR C0000003 (Bottom) -------------------------------------------------------------------- Data for Block 2, MP1T Bottom Crate (rack 18I) CDF-152 Page 186 DETECTOR COMPONENT BANKS -------------------------------------------------------------------- P2 MP1T_09 register CSR C0000002 (Bits 48-71 of bus) P2+1 MP1T_09 register CSR C0000001 (Bits 24-47 of bus) P2+2 MP1T_09 register CSR C0000000 (Bits 00-23 of bus) -------------------------------------------------------------------------------- Note: The next card may exist for Run 1B - omit it for now Data for Block 1, MP1T Bottom Crate (rack 18I) P1+ 6 MP1T_13 register CSR C0000003 (Bottom) CDF-152 Page 187 DETECTOR COMPONENT BANKS 7.56 TEXD Bank - Level One Trigger Central Muon Extension Detector Bank This bank pertains to the contents of the Central Muon Extension Level One Trigger Cards (MX1T). These cards are very similar to the Central Muon MU1T cards. Each card has two registers read out. The first 24 bits of register C0000010 contains the low threshold triggers for wire pairs 00-47. The first 24 bits of register C0000011 contains the high threshold triggers for wire pairs 00-47. 8 radially aligned wire pairs corresponds to 5 degrees in Phi. Therefore, each trigger card spans 30 degrees in Phi. ____ _______ Bank History 19-Jan-1991 M. Krasberg Original Creation The TEXD bank header values are: Bank Name : "TEXD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TEXD bank format is: Displacement (I*4) Contents Description 0 2 No. of Blocks 1 P0 Pointer to block 0, MX1T 00-08 2 P1 Pointer to block 1, MX1T 12-20 3 P2 End of Data Pointer -------------------------------------------------------------------- Data for Block 0, MX1T Top Crate (rack 18H) -------------------------------------------------------------------- P0 MX1T_00 register CSR C0000010 (Top) P0+ 1 MX1T_00 register CSR C0000011 (Top) P0+ 2 MX1T_01 register CSR C0000010 (Top) P0+ 3 MX1T_01 register CSR C0000011 (Top) P0+ 4 MX1T_02 register CSR C0000010 (Top) CDF-152 Page 188 DETECTOR COMPONENT BANKS P0+ 5 MX1T_02 register CSR C0000011 (Top) P0+ 6 MX1T_03 register CSR C0000010 (Top) P0+ 7 MX1T_03 register CSR C0000011 (Top) P0+ 8 MX1T_04 register CSR C0000010 (Top) P0+ 9 MX1T_04 register CSR C0000011 (Top) P0+10 MX1T_05 register CSR C0000010 (Top) P0+11 MX1T_05 register CSR C0000011 (Top) P0+12 MX1T_06 register CSR C0000010 (Top) P0+13 MX1T_06 register CSR C0000011 (Top) P0+14 MX1T_07 register CSR C0000010 (Top) P0+15 MX1T_07 register CSR C0000011 (Top) P0+16 MX1T_08 register CSR C0000010 (Top) P0+17 MX1T_08 register CSR C0000011 (Top) -------------------------------------------------------------------- Data for Block 1, MX1T Bottom Crate (rack 18H) -------------------------------------------------------------------- P1 MX1T_12 register CSR C0000010 (Bottom) P1+ 1 MX1T_12 register CSR C0000011 (Bottom) P1+ 2 MX1T_13 register CSR C0000010 (Bottom) P1+ 3 MX1T_13 register CSR C0000011 (Bottom) P1+ 4 MX1T_14 register CSR C0000010 (Bottom) P1+ 5 MX1T_14 register CSR C0000011 (Bottom) P1+ 6 MX1T_15 register CSR C0000010 (Bottom) P1+ 7 MX1T_15 register CSR C0000011 (Bottom) P1+ 8 MX1T_16 register CSR C0000010 (Bottom) P1+ 9 MX1T_16 register CSR C0000011 (Bottom) P1+10 MX1T_17 register CSR C0000010 (Bottom) P1+11 MX1T_17 register CSR C0000011 (Bottom) P1+12 MX1T_18 register CSR C0000010 (Bottom) P1+13 MX1T_18 register CSR C0000011 (Bottom) P1+14 MX1T_19 register CSR C0000010 (Bottom) P1+15 MX1T_19 register CSR C0000011 (Bottom) P1+16 MX1T_20 register CSR C0000010 (Bottom) P1+17 MX1T_20 register CSR C0000011 (Bottom) -------------------------------------------------------------------------------- CDF-152 Page 189 DETECTOR COMPONENT BANKS 7.57 CEGD Bank - Central EM High Gain Calorimeter Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CEGD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 190 DETECTOR COMPONENT BANKS Notes: 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 Gain (0) Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-9) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). 3. This bank only has x16 channels. The format is identical to CEMD. CDF-152 Page 191 DETECTOR COMPONENT BANKS 7.58 CMRD Bank - Central Muon Upgrade Scintillators Raw TDC Data Bank This bank has raw, unreformatted 1879 data for the Central Muon Upgrade scintillators. ____ _______ Bank History 16-May-1992 David A. Smith Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "CMRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CMRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 1 Number of blocks 1 P0 Pointer to block 0, data for prototype counters 2 P1 pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, (Prototype counters) -------------------------------------------------------------- P0 NTDC2 Number of TDCs x 2 in prototype array P0+1 TL0 Pointer to leading edge data from TDC 0 P0+2 TT0 Pointer to trailing edge data from TDC 0 P0+3 TL1 Pointer to leading edge data from TDC 1 P0+4 TT1 Pointer to trailing edge data from TDC 1 . . . . P0+NTDC2+1 Pointer to first word of next block . . etc. The Data for each Block has the format:- TDC data word 0 32 bits TDC data word 1 32 bits ..... ______ Notes: CDF-152 Page 192 DETECTOR COMPONENT BANKS 1. With the exception of the number of blocks of data and the number of TDCs associated with each block, CSP TDC data is the same as that of the CSX, CMP, CMX, CTC, and VTX. 2. The TDC hits are not in order by time or channel. However, they are also not totally randomly ordered. Each TDC block starts with all the data from the set of first channels in each TDC hextant (channels 0, 16, 32, 48, 64, 80) ordered by time (NOT channel). Then comes all the data from channels 1, 17, 33, 49, 65, and 81 ordered by time. This pattern is repeated for the remaining 14 sets of channels. Note that the data for a particular channel does appear in time order. The trailing edge data follows the same pattern, however the leading and trailing edge data is NOT in matching order, they each must be sorted independently. 3. Definition of bit fields in the TDC hit word Bits Contents ---- -------- 0:00 Phase bit 1:09 Number of TDC counts (4 ns/count) (0-511) 16:22 TDC channel number (0-127, but only 0-95 are legitimate) 27:31 FASTBUS slot number where the TDC resides 4. All superlayers contain 1 TDC for a total of 4 TDCs 5. CSP reformatted TDC data is saved in bank CSPD. 6. Minimum bank length = 22 I*4 words. CDF-152 Page 193 DETECTOR COMPONENT BANKS 7.59 ERRD Bank - Error Reporting Bank This bank has a summary of readout and reformatting errors detected by the hardware Event Builder. ____ _______ Bank History 17-Jun-1988 Pekka Sinervo This Bank has the following Bank Header Characteristics:- Bank Name : "ERRD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The ERRD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 1 Number of blocks 1 P0 Pointer to block 0 2 Pointer to end of data + 1 P0 NERR Number of readout errors -------------------------------------------------------------- Data for first readout error -------------------------------------------------------------- P0+1 VMS error code for error P0+2 N1 Number of words of data associated with 1st readout error P0+3 Data word 1 P0+4 Data word 2 . . -------------------------------------------------------------- Data for second readout error -------------------------------------------------------------- P0+N1+2+1 VMS error code for error P0+N1+2+2 N2 Number of words of data associated with 2nd readout error P0+N1+2+3 Data word 1 P0+N1+2+4 Data word 2 . . -------------------------------------------------------------- Data for next readout error -------------------------------------------------------------- . . . . . . etc. CDF-152 Page 194 DETECTOR COMPONENT BANKS CDF-152 Page 195 DETECTOR COMPONENT BANKS Notes: 1. When a data acquisition error occurs when an event is being read out of the detector, being reformatted in the Event Builder or being transferred from the EVB to Level 3, the DAQ system has to respond in a well-defined manner. For this purpose, bank ERRD is appended to the event record. The existence of this bank in an event record indicates that an error was detected. (Bits in the trigger mask may also be used to flag errors.) 2. ERRD has a block of N+2 words for each error with N = number of data words included to help define/diagnose the error. The bank has one block with the number of errors (NERR) defined by the first word in the block. The error entries are variable length. 3. VMS error codes identify the source and type of error. The number of words of data associated with the error also correspond to the number of words specified in the definition of the error code in the appropriate .MSG file. The errors detected by the Hardware EVB are defined in the file EVB_MESSAGE_CODES.MSG. 4. The hardware EVB appends an ERRD bank to the end of an event record whenever a readout error has occured. This is done by writing ERRD to the end of event record after the record has been pushed to the next stage in the DAQ pipeline. 5. There are four stages of the event readout where error conditions can be detected: 1) Formatting of raw data in the scanners, 2) EVB reading data from scanners, 3) Reformatting of data by the EVB, 4) EVB writing data to the next stage in the pipeline. 6. When a readout error occurs accessing data in a scanner, the EVB attempts to read as much of the data in the scanner event buffer as possible, and attempts to reformat as much of the data as possible. However, for most scanner readout errors, the scanner data is probably abandoned. 7. Errors detected during reformatting are signalled and the EVB tries to make as much sense of the scanner data as possible. If a reasonable attempt at interpreting the corrupted data fails, the scanner data is abandoned. CDF-152 Page 196 DETECTOR COMPONENT BANKS 8. If an error occurs when the event record is being written to the next stage in the pipeline, the EVB is forced to abandon the part of the event that was not transferred and attempts to fix up the event record and append an ERRD bank to it. CDF-152 Page 197 DETECTOR COMPONENT BANKS 7.60 ALMD Bank - MX Alarms And Limits Monitoring Bank This bank has Alarms and Limits monitoring data from MX scanners. ____ _______ Bank History 1-July-88 WS Original version This bank has the following Bank Header Characteristics: Bank Name : "ALMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is: Displacement (I*2) Contents Description 0 1 No. of Blocks 1 3 Block Pointer 2 End of Data Pointer 3 Data for All Scanners ... ... etc. Notes: 1. The data monitoring all scanners is placed in one block with the following format: Cluster Width/Start Channel 16 bits Channel contents 16 bits .... Cluster Width/Start Channel 16 bits Channel contents 16 bits .... etc. 2. Cluster Width/Start Channel is a 16-bit word specifying the width of the Cluster and the first Channel Identifier in the cluster. This word is composed of the following fields: Bit 0- 4 Monitoring Function Bit 5-12 MX Scanner Number Bit 13-15 Cluster Width (0:7 --> 1-8) CDF-152 Page 198 DETECTOR COMPONENT BANKS 3. Channel contents. 16 bit ADC value. 4. Monitoring Functions: 0 = Arith Board / -5v 6 = OX Board / -0.9v 1 = Addr Board / -5v 7 = UM Board / -0.9v 2 = Seq Board / -5v 8 = UM Board / -2v 3 = EM Board / -5v 9 = EM Board / -2v 4 = OX Board / -5v 10 = +5v Regulator 5 = UM Board / -5v 11 = Temperature Monitor 5. Currently, there are 58 MX scanners used for data acquisition. A special "Alarms and Limits" MX monitors the power supplies and rack temperature of all scanners. In normal operation, the pedestal and thresholds will be set for these monitors so that they are only read out when their value falls outside the normal range. CDF-152 Page 199 DETECTOR COMPONENT BANKS 7.61 CSPD Bank - Raw Data Bank For The Scintillators Of The Central Muon Upgrade This bank has TDC data for the scintillators of the Central Muon Upgrade. The CSP Detector Bank format for raw TDC data is similar to that of the CSX (Central Scintillators for the Muon Extension), CMX (Central Muon Extension), CMP (Central Muon Upgrade), CTC, and VTX. These detector banks all contain TDC hits from LRS 1879 TDCs read out by SSPs. For 1992, 12 CSP prototypes are being installed. These will be read out from a single TDC in a single block. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information. There is only one pointer. There is a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. Here, the term "pointer" is an offset from the start of the current block rather than an absolute address. All data are packed in I*4 words. This Bank has the following Bank Header Characteristics. Bank Name : "CSPD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CSPD bank format is as follows. _______ ________ Address Contents ________________________ INDDAT+0 | Number of pointers | Block A +1 | PAS# = pointer to | . | prototypes | pointer . | | block +2 | Pointer - end of data| ________________________ PAS0 | Number of TDCs | Block B0 PAS0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for prototype array ________________________ PAS0 + PC0 | Data for TDC 0 | Block B1 . | " | Data for prototype array PAS0 + PCN | Data for TDC N | . | " | . | | CDF-152 Page 200 DETECTOR COMPONENT BANKS _____ __ _________ _____ _______ _____ Block A: Prototype array Pointer Block ____ ________ Word Contents 0 NAS = # of prototype arrays (1) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NAS-1 = pointer to end of YBOS bank + 1 for i = NAS _____ ______ ___ _______ _________ ___ ___ _______ _ Block B0(i): TDC pointer sub-block for Arc Section i ____ ________ Word Contents 0 NTDC(i) = number of TDCs in prototype array 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) It is permissable, if the prototype section is empty of data, that the block B0(i) be omitted entirely. The section pointer in block A MUST be present in all cases, though it may just indicate an empty section by its pointer offset value. In blocks pertaining to sections with data, each TDC has an entry in this pointer block even if there are no hit data. Entries in these TDC pointer blocks are defined as follows. bits 0-15 pointer to start of hit data for TDC j 16-31 available bits, potentially available to flag detected corrupt or incomplete data Bit 30 is set when the TDC is not fully read out. (this condition arises when the are too many hits in this TDC. If this is so, various wire/hit limits are invoked, and not all data present are read out, in order to avoid overflowing buffer size limits) CDF-152 Page 201 DETECTOR COMPONENT BANKS _____ ________ ___ ____ _________ ___ ___ _______ __ ___ Block B1(i,j): Hit data sub-block for Arc Section i, TDC _ j TDC data have the following format. bits 0- 9 T = Leading edge TDC count. (10 bits; bit 0 is the "phase" bit) 10-18 L = Width of the pulse in counts. (9 bits, aligned with bits 1-9) 19-25 C = Channel number within this TDC. (0:95 are "legal" channels) 27-29 E = Error word = 1 Pulse structure error 2 Unused channel 3 Illegal channel (>95) 4 Miscellaneous 30 N = Flag bit, indicating that the data on this wire were not completely read out. N=1 flags this.) 31 S = Stop bit = 1 for last hit on this wire. Only channels with hit data appear in these blocks. The 96 channels 0:95 are potentially legal channels. The scintillator arcs are read out in increasing azimuth. The lowest numbered channel on each side is at an azimuth of -45 degrees. The block of CSP data corresponds to the detector section described below. ________ __________________ Detector Number of Channels Location Used Unused Prototype array 12 12:95 -------------------------------------------- Total number of channels 12 84 In the 1992 run configuration, the signals of every section, after being discriminated, go in one TDC which is fully contained in a single "block". There exists the possibility that the read out produces a different number of leading and trailing edge digitizations. In this case, by convention, the SSP fills in a "0" for a missing trailing edge associated to a leading edge, and a "511" for a leading edge that is missing the corresponding trailing edge. ______ Notes: 1. Each arc section must be read out within an integral number of TDC modules, thus 1 TDC per section is required. CDF-152 Page 202 DETECTOR COMPONENT BANKS 2. A total of 1 TDC module is required for the 1992 run. CDF-152 Page 203 DETECTOR COMPONENT BANKS 7.62 TMXD Bank - MX Scanner Time Bank This bank has MX algorithm execution time data. ____ _______ Bank History 1-Jul-88 WS Original version 16-Apr-93 FL/KB Modified for 1992 Run This bank has the following Bank Header Characteristics: Bank Name : "TMXD" Bank Number : 1-4 Bank Type : BNKTI2 (Integer*2) where the format of the data is: Displacement (I*2) Contents Description 0 1 Number of Blocks 1 P0=4 Pointer to Start of Data 2 P1 End of Data Pointer 3 0 Null Word ..... ..... ..... IOFF+0 0-60 Scanner ID IOFF+1 1 Indicates New Bank Format IOFF+2 lower 16 bits Total time (Scan time + MX refor. time) IOFF+3 upper 16 bits Total time (Scan time + MX refor. time) IOFF+4 lower 16 bits Scan time IOFF+5 upper 16 bits Scan time IOFF+6 - Total # of channels in top UM list IOFF+7 - Total # of channels in bot. UM list IOFF+8 - Length of Raw Data Buffer IOFF+9 - Number of accepted channels IOFF+10 - Number of online channels on top port IOFF+11 - Number of online channels on bot. port ..... ..... ..... etc. Notes: 1. Each MX scanner has a 32 bit, "Real Time" clock, which is used to measure the time required for the MX program (algorithm) to complete its function. The clock is started upon receiving START-SCAN, and stopped just before EOS is raised by the MX program. Each clock tick represents 100 ns. 2. Each MX generates at most one channel (14 16-bit words) of TMXD data. This data will not be added to the Event Buffer (in the MX) if doing so would cause CDF-152 Page 204 DETECTOR COMPONENT BANKS an overflow condition in that MX. 3. The individual TMXD data generated in the MX scanners is grouped into a small number (one or two) of TMXD banks by the event builder. 4. Each TMXD bank consists of only one block. The pattern of data words illustrated above (displacements of IOFF+0 through IOFF+11) is repeated for each MX scanner. For the first scanner, IOFF equals 4; for the second scanner, IOFF equals 16; etc. The number of scanners for which there is data in a given TMXD bank can be obtained from the end of data pointer: N_Scnrs = (End_of_data_Pointer - 4) / 12 5. It is possible to have several TMXD banks in an event, each with a different bank number. This is due to the fact that when MX scanners are read out with the hardware event builder, data from central and wall MX scanners is reformatted in a different reformatter board that data from plug and forward scanners (each reformatter board builds its own TMXD bank). 6. The Scanner ID specifies the MX scanner generating the associated timing information. The bit assignment within the scanner ID is as follows: Bit 0- 7 MX Scanner Number Bit 8-12 not used = 0 Bit 13-15 Cluster Width = 0 CDF-152 Page 205 DETECTOR COMPONENT BANKS 7.63 PRMD Bank - RABBIT Card PROM Digital Data Bank This bank has ASCII identifiers for RABBIT cards. ____ _______ Bank History 1-July-88 SH Original version This Bank has the following Bank Header Characteristics:- Bank Name : "PRMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 1 No. of Blocks 1 3 Beginning of Data Pointer 2 End of Data Pointer 3 Beginning of Data ...... etc. Notes: 1. Data from all MX scanners and RABBIT cards is considered as one block with the following format: Channel ID 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel ID 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits CDF-152 Page 206 DETECTOR COMPONENT BANKS Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits ..... Channel ID 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits Channel contents 16 bits 2. Channel ID is a 16 Bit word specifying the Channel identifier for the following set of PROM characters (17 I*2 words containing 32 characters plus 2 characters of padding). Notice NO clustering is allowed for this bank. The Channel identifier word is composed of the following fields:- Bits 0- 4 Slot Number (0-31) Bits 5- 7 Port/crate Number (0-7) Bits 8-15 MX Number (0-255) 3. Channel contents. 16 Bit Digital value (corresponding to two ASCII characters of PROM digital readout). CDF-152 Page 207 DETECTOR COMPONENT BANKS 7.64 TODD Bank - Time Of Day Detector Bank This bank has the date and time. ____ _______ Bank History 29-June-88 JP Original version This Bank has the following Bank Header Characteristics:- Bank Name : "TODD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TODD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 1 Number of blocks 1 P0 Pointer to block 0 2 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Date and Time -------------------------------------------------------------- P0 0.1 seconds P0+1 Seconds P0+2 Minutes p0+3 Hours P0+4 Day P0+5 Month P0+6 Year Notes: 1. This date and time are read from a CAMAC module which is also used by Alarms and Limits. 2. Minimum (Maximum) bank length = 10 (10) I*4 words. CDF-152 Page 208 DETECTOR COMPONENT BANKS 7.65 MTPD Bank - MX Test Partition Bank This bank has the following Bank Header Characteristics: ____ _______ Bank History 29-Aug-88 WS Original version Bank Name : "MTPD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is: Displacement (I*2) Contents Description 0 2 No. of Blocks 1 4 Block Pointer 2 n Block Pointer 3 End of Data Pointer 4 Data from Top Port ... ... ... n Data from Bottom Port ... ... ... etc. 1. No. of Blocks. Data read through the TOP port on the MX is placed in the first block and data read through the BOTTOM port is placed in the second. 2. Block Pointers. Specifies the Integer*2 displacement of the data relative to the Bank Data Index. The word count for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the Integer*2 displacement of the word following the last word in the data. 4. The data for each Block has the format: Logical ID 16 bits Channel contents 16 bits .... Logical ID 16 bits Channel contents 16 bits .... etc. CDF-152 Page 209 DETECTOR COMPONENT BANKS 5. Logical ID. 16 bit word specifying the logical card and channel ID of each channel in the MX Test Partition. This word is composed of the following fields: Bit 0- 5 Logical Channel ID Bit 6-11 Logical Card ID Bit 12-12 Not Used Bit 13-15 Cluster Width (0:7 --> 1-8) 6. Channel contents. 16 bit ADC value. Notes: 1. Purpose. The MX Test Partition (Rabbit Scanner 99) is used to test new and suspect MX scanners in the context of the full CDF Data Acquisition System. 2. Configuration. The Test Partition currently includes two Rabbit crates, one connected to the TOP port on the MX and the other to the BOTTOM. Each crate has 3 SCA (Strip) cards located in slots 4, 5 and 6. Logical card IDs are assigned to each card and logical channel IDs are assigned to each sub-address. CDF-152 Page 210 DETECTOR COMPONENT BANKS 7.66 CPRD Bank - Central Preradiator Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CPRD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 211 DETECTOR COMPONENT BANKS 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- ???? 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 212 DETECTOR COMPONENT BANKS 7.67 CMXD Bank - Central Muon Extension Raw Data Bank This bank has TDC data for the Central Muon Extension. The CMX Detector Bank format for raw TDC data is similar to that of the CTC, VTX and CMP (Central Muon Upgrade). These detector banks all contain TDC hits from LRS 1879 TDCs read out by SSPs. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each region. There are 8 such pointers. Each of the eight 90-degree quarter-sections (QS) is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. Here, the term "pointer" is an offset from the start of the current block rather than an absolute address. All data are packed in I*4 words. This Bank has the following Bank Header Characteristics. Bank Name : "CMXD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CMXD bank format is as follows. _______ ________ Address Contents ________________________ INDDAT+0 | Number of pointers | Block A +1 | PQS# = pointers to | . | each QS | Quarter Section pointer . | | block +9 | Pointer - end of data| ________________________ PQS0 | Number of TDCs | Block B0 PQS0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for Quarter Section ________________________ PQS0 + PC0 | Data for TDC 0 | Block B1 . | " | . | | Data for Quarter Section 0 PQS0 + PCN | Data for TDC N | . | " | . | | ________________________ PQS1 | Number of TDCs | TDC pointer block . | PC# = TDC Pointers | for Quarter Section 1 ________________________ | | . | Data | CDF-152 Page 213 DETECTOR COMPONENT BANKS . | | _____ __ _______ _______ _______ _____ Block A: Quarter Section Pointer Block ____ ________ Word Contents 0 NQS = # of Quarter Sections (8) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NQS-1 = pointer to end of YBOS bank + 1 for i = NQS _____ ______ ___ _______ _________ ___ _______ _______ _ Block B0(i): TDC pointer sub-block for Quarter Section i ____ ________ Word Contents 0 NTDC(i) = number of TDCs in Quarter Section i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) It is permissable, if the entire quarter section is empty of data, that the block B0(i) be omitted entirely. The section pointer in block A MUST be present in all cases, though it may just indicate a missing quarter section by its pointer offset value. In blocks pertaining to sections with data, each TDC has an entry in this pointer block even if there are no hit data. Entries in these TDC pointer blocks are defined as follows. bits 0-15 pointer to start of hit data for TDC j 16-31 available bits, potentially available to flag detected corrupt or incomplete data Bit 30 is set when the TDC is not fully read out. (this condition arises when the are too many hits in this TDC. If this is so, various wire/hit limits are invoked, and not all data present are read out, in order to avoid overflowing buffer size limits) CDF-152 Page 214 DETECTOR COMPONENT BANKS _____ ________ ___ ____ _________ ___ _______ _______ __ Block B1(i,j): Hit data sub-block for Quarter Section i, ___ _ TDC j TDC data have the following format. bits 0- 9 T = Leading edge TDC count. (10 bits; bit 0 is the "phase" bit) 10-18 L = Width of the pulse in counts. (9 bits, aligned with bits 1-9) 19-25 C = Channel number within this TDC. (0:95 are "legal" channels) 27-29 E = Error word = 1 Pulse structure error 2 Unused channel 3 Illegal channel (>95) 4 Miscellaneous 30 N = Flag bit, indicating that the data on this wire were not completely read out. N=1 flags this.) 31 S = Stop bit = 1 for last hit on this wire. Only channels with hit data appear in these blocks. The 96 channels 0:95 are potentially legal channels. In the actual read out of a wedge, tubes are read out in increasing radial separation from the beam axis within a given azimuthal slice. Slices are taken in increasing azimuth. The lowest numbered channel on each side is at an azimuth of -45 degrees. There exists the possibility that the read out produces a different number of leading and trailing edge digitizations. In this case, by convention, the SSP fills in a "0" for a missing trailing edge associated with a leading edge, and a "511" for a leading edge that is missing the corresponding trailing edge. ______ Notes: 1. There are an integral number of TDCs for each quarter section. The mechanical unit for CMX is a 15 degree wedge with 48 physical chambers. Each 90 degree section has 288 channels--one per chamber. Thus 3 TDCs are required per section. All legal channels (96) of each TDC are used. 2. The 90 degree sections begin at CDF phi of -45 degrees on the west side of the detector. For the '91 run, only 3 sections on each side will be installed. There will be no chambers on the floor (225-315 degrees). Due to the solenoid chimney, two wedges on the east side are missing (75-105 degrees) in the '91 run. CDF-152 Page 215 DETECTOR COMPONENT BANKS 3. Thus, a total of 17 TDCs is required for '91. 4. A negative "Number of QS Pointers" indicates that error checking was run in the reformatting code. 5. The "Number of QS Pointers" (see address INDDAT+0) is 8. CDF-152 Page 216 DETECTOR COMPONENT BANKS 7.68 CMPD Bank - Central Muon Upgrade Raw Data Bank This bank has TDC data for the Central Muon Upgrade Chambers. The CMP Detector Bank format for raw data is similar to that of the CTC, VTX and CMX (Central Muon Extension). These detector banks all contain TDC hits from LRS 1879 TDCs read out by SSPs. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each region. There are four such pointers. Each of the four regions (RS) is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. Here, the term "pointer" is an offset from the start of the current block rather than an absolute address. All data are packed in I*4 words. This Bank has the following Bank Header Characteristics. Bank Name : "CMPD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CMPD bank format is as follows. _______ ________ Address Contents ________________________ INDDAT+0 | Number of pointers | Block A +1 | PRS# = pointers to | . | each RS | Region pointer . | | block +5 | Pointer - end of data| ________________________ PRS0 | Number of TDCs | Block B0 PRS0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for Region 0 ________________________ PRS0 + PC0 | Data for TDC 0 | Block B1 . | " | . | | Data for Region 0 PRS0 + PCN | Data for TDC N | . | " | . | | ________________________ PRS1 | Number of TDCs | TDC pointer block . | PC# = TDC Pointers | for Region 1 ________________________ | | CDF-152 Page 217 DETECTOR COMPONENT BANKS . | Data | . | | _____ __ ______ _______ _____ Block A: Region Pointer Block ____ ________ Word Contents 0 NRS = # of Regions (4) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NRS-1 = pointer to end of YBOS bank + 1 for i = NRS _____ ______ ___ _______ _________ ___ ______ _ Block B0(i): TDC pointer sub-block for Region i ____ ________ Word Contents 0 NTDC(i) = number of TDCs in Region i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) It is permissable, if the entire region is empty of data, that the block B0(i) be omitted entirely. The region pointer in block A MUST be present in all cases, though it may just indicate a missing region by its pointer offset value. In blocks pertaining to regions with data, each TDC has an entry in this pointer block even if there are no hit data. Entries in these TDC pointer blocks are defined as follows. bits 0-15 pointer to start of hit data for TDC j 16-31 available bits, potentially available to flag detected corrupt or incomplete data Bit 30 is set when the TDC is not fully read out. (This condition arises when the are too many hits in this TDC. If this is so, various wire/hit limits are invoked, and not all data present are read out, in order to avoid overflowing buffer size limits) CDF-152 Page 218 DETECTOR COMPONENT BANKS _____ ________ ___ ____ _________ ___ ______ __ ___ _ Block B1(i,j): Hit data sub-block for Region i, TDC j TDC data have the following format. bits 0- 9 T = Leading edge TDC count. (10 bits; bit 0 is the "phase" bit) 10-18 L = Width of the pulse in counts. (9 bits, aligned with bits 1-9) 19-25 C = Channel number within this TDC. (0:95 are "legal" channels) 27-29 E = Error word = 1 Pulse structure error 2 Unused channel 3 Illegal channel (>95) 4 Miscellaneous 30 N = Flag bit, indicating that the data on this wire were not completely read out. N=1 flags this.) 31 S = Stop bit = 1 for last hit on this wire. Only channels with hit data appear in these blocks. The 96 channels 0:95 are potentially legal channels. In the actual read out of a wedge, tubes are read out in increasing radial separation from the beam axis within a given azimuthal slice. Slices are taken in increasing azimuth. The lowest numbered channel on each side is at an azimuth of -45 degrees. Only channels with hit data appear in these blocks. The 96 channels, 0:95, are potentially legal channels. The chambers of the detector are arranged in stacks of four chambers on a rectangular grid surrounding the detector. In the read out of the detector, tubes are read out in increasing radial separation from the beam axis within a given stack. Stacks are read out in increasing azimuth. The lowest numbered channel (at bottom of the north wall) is at an azimuth of approximately -45 degrees. There exists the possibility that the read out produces a different number of leading and trailing edge digitizations. In this case, by convention, the SSP fills in a "0" for a missing trailing edge associated with a leading edge, and a "511" for a leading edge that is missing the corresponding trailing edge. ______ Notes: 1. There are an integral number of TDCs for each region. 1991 Region #TDCs 0 North Wall 3 1 Top 4 2 South Wall 3 CDF-152 Page 219 DETECTOR COMPONENT BANKS 3 Bottom 3 2. A total of 13 TDCs is required for '91. 3. A negative "Number of RS Pointers" indicates that error checking was run in the reformatting code. 4. The "Number of RS Pointers" (see address INDDAT+0) is 4. CDF-152 Page 220 CALIBRATION EVENT BANKS 8 CALIBRATION EVENT BANKS This section describes the data structure for scanner and event banks for calibration of the detector components : Central Electromagnetic Calorimeter,Central Hadron Calorimeter and Endwall Calorimeter. Formats exist both for runs in which the MX forms a calibration summary bank and for runs in which a non-standard data format is required for the raw data. CDF-152 Page 221 CALIBRATION EVENT BANKS 8.1 VTWX Bank - VTpc Wire Calibration Summary Bank. This bank contains calibration summary information from the VTPC wires for a number of events taken at a particular delay setting. The overall structure is similar to the VTWD bank, however there are multiple words of information for each wire, and there is information for every wire in the chamber. The VTWX bank begins with a list of phi bin block pointers, followed by the individual half-module data blocks. Each half-module data block begins with a list of octant block pointers, followed by the actual octant data blocks. Finally, each octant data block contains exactly four 32 bit words for every wire, regardless of the number of hits observed in each event. The TDC data are ordered by increasing wire address. The VTWX bank header values are: Bank Name : "VTWX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The VTWX bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 8 number of Phi Bin pointers 1 M0 pointer to Phi Bin 0 data block 2 M1 pointer to Phi Bin 1 data block . . . . 8 M7 pointer to Phi Bin 7 data block 9 M8 pointer to end of data + 1 ---------------------------------------------------------- M0 NEV/NHM Number of Events/Number Half Modules bits 00-07: Number of half module pointers for phi 0 (=16) bits 15-31: Number of events taken M0+1 O0 pointer to half module 0 data block M0+2 O1 pointer to half module 1 data block . . . . M0+16 O15 pointer to half module 15 data block M0+17 O16 pointer to end of phi 0 data + 1 -------------------------------------- M0+O0 TDC data word 0 for half module 0 M0+O0+1 TDC data word 1 for half module 0 . . . . M0+O1-1 last TDC data word for half module 0 -------------------------------------- M0+O1 TDC data word 0 for half module 1 CDF-152 Page 222 CALIBRATION EVENT BANKS M0+O1+1 TDC data word 1 for half module 1 . . . . M0+O16-1 last TDC data word for half module 15 ---------------------------------------------------------- M1 NEV/NHM number of half module pointers (bits 0-7) and number of events (bits 15-31) for phi 1 M1+1 pointer to half module 0 data block . . . . M8-1 last TDC data word for phi 7, half mod 15 Notes: 1. The mapping from half modules to octants and modules is:- half module 0 : octant 0-7, module 0 1 : octant 8-15, module 0 2 : octant 0-7, module 1 3 : octant 8-15, module 1 .... 2. For each wire there are 4 32 bit words containing the following information: word 0: Bits Contents ---- -------- 0: 4 TDC slot number 5:11 TDC channel number 12:18 TDC crate number 19:23 wire number 24:27 pointer to first data word for next wire 28:31 reserved for failure code (filled in offline) word 1: Bits Contents ---- -------- 0:15 Sum of times of leading edge of first hit 16:31 Sum of widths of first hit for each event word 2: Sum of squares of leading edge time of first hit in each event CDF-152 Page 223 CALIBRATION EVENT BANKS word 3: Bits Contents ---- -------- 0:15 Total number of hits observed 16:31 Number of events with at least one hit CDF-152 Page 224 CALIBRATION EVENT BANKS 8.2 CTCX Bank - CTC Calibration Summary Bank This bank contains calibration summary information from the CTC wires for a number of events taken at a particular delay setting. The overall structure is similar to the CTCD bank, however there are multiple words of information for each wire, and there is information for every wire in the chamber. The structure of this YBOS bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each super layer. Each of the inner (NSL-1) = 9 superlayers is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. The data from the outer drift tube layers are not included. There are exactly four words of data for each and every wire, regardless of the actual number of TDC hits observed in each event. _______ ________ Address Contents ________________________ INDDAT+0 | Number of pointers | Super Layer pointer block +2 | PSL# = pointers to | . | each SL | ________________________ . | | PSL0 | Nevt/Ncells | Block B0 PSL0+1 | PC# = cell pointers | . | " " | Cell pointer block . | " " | for Super Layer 0 ________________________ . | | PSL0 + PC0 | Data for Cell 0 | Block B1 . | " | . | | Data for Super Layer 0 PSL0 + PCN | Data for Cell N | . | " | . | | ________________________ . | | PSL1 | Nevt/Ncells | Cell pointer block . | Pointers | for Super Layer 1 ________________________ . | | . | Data | . | | CDF-152 Page 225 CALIBRATION EVENT BANKS __________________________________ Block A: Super Layer Pointer Block ____ ________ word Contents 0 NSL = # of super layers (10) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NSL-1 = pointer to end of YBOS bank + 1 for i = NSL _____________________________________________________ Block B0(i): Cell pointer sub-block for super layer i ____ ________ word Contents 0 Number of events/NCELL(i) Number of events(bits 15-31) = Number of events taken NCELL(i)(bits 0-7) = # of cells in super layer i 1+j Pointers: = pointer to start of cell j for 0 < j < NCELL(i) - 1 = pointer to "end-of-block + 1" for j = NCELL(i) Each cell has an entry in this pointer block even if there is no hit data. ___________________________________________________________ Block B1(i,j): Hit data sub-block for super layer i, cell j TDC data for the inner 9 super layers has the following format: word 0: bits 0- 4 TDC slot number 5-11 TDC channel number 12-18 TDC crate number 19-23 wire number 24-27 pointer to first data word for next wire 28-31 reserved for failure code (filled in offline) word 1: bits 0-15 Sum of first leading edge time for each event (including phase) bits 16-31 Sum of widths of first hit for each event word 2: Sum of squares of first leading edge time for each event CDF-152 Page 226 CALIBRATION EVENT BANKS word 3: bits 0-15 Total number of hits observed bits 16-31 Total number of events with at least one hit CDF-152 Page 227 CALIBRATION EVENT BANKS 8.3 CEMX Bank - Central EM Calorimeter MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CEMX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel ...... Error flag packed with next Logical Channel Address CDF-152 Page 228 CALIBRATION EVENT BANKS ...... The Error Flag can be run type dependent and will be defined later. However, zero implies good data. The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-9) Bits 6-10 Azimuth Segmentation (0-23) The calibration data is dependent on run type: Pedestal Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Pedestal in counts*64 Word 3: Pedestal Sigma**2 in counts**2*64 Flasher Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Flasher response in counts*64 Word 3: Flasher response Sigma**2 in counts**2*64 Word 4: Mean Flasher/Pin in 10**-4 % Word 5: Sigma**2 Flasher/Pin in (10**-4) **2 % LED Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Flasher response in counts*64 Word 3: Flasher response Sigma**2 in counts**2*64 Word 4: Mean LED/Pin in 10**-4 % Word 5: Sigma**2 LED/Pin in (10**-4) **2 % Charge Injection Run Type: (N records for N DAC values) Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: DAC value lower 16 bits: Number of reads at this DAC value Word 2: Mean value from subaddress in counts*64 Word 3: Sigma**2 from subaddress in (counts*64)**2 CDF-152 Page 229 CALIBRATION EVENT BANKS 8.4 CHAX Bank - Central Hadron Calorimeter MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CHAX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel ...... Error flag packed with next Logical Channel Address CDF-152 Page 230 CALIBRATION EVENT BANKS ...... The Error Flag can be run type dependent and will be defined later. However, zero implies good data. The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-7) Bits 6-10 Azimuth Segmentation (0-23) The calibration data is dependent on run type: Pedestal Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Pedestal in counts*64 Word 3: Pedestal Sigma**2 in counts**2*64 Laser Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Laser response in counts*64 Word 3: Lase response Sigma**2 in counts**2*64 Charge Injection Run Type: (N records for N DAC values) Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: DAC value lower 16 bits: Number of reads at this DAC value Word 2: Mean value from subaddress in counts*64 Word 3: Sigma**2 from subaddress in (counts*64)**2 CDF-152 Page 231 CALIBRATION EVENT BANKS 8.5 WHAX Bank - Endwall Calorimeter MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "WHAX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel ...... Error flag packed with next Logical Channel Address CDF-152 Page 232 CALIBRATION EVENT BANKS ...... The Error Flag can be run type dependent and will be defined later. However, zero implies good data. The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. Bit 0 x16 (0) or x1 (1) Gain Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-5) Bits 6-10 Azimuth Segmentation (0-23) The calibration data is dependent on run type: Pedestal Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Pedestal in counts*64 Word 3: Pedestal Sigma**2 in counts**2*64 Charge Injection Run Type: (N records for N DAC values) Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: DAC value lower 16 bits: Number of reads at this DAC value Word 2: Mean value from subaddress in counts*64 Word 3: Sigma**2 from subaddress in (counts*64)**2 CDF-152 Page 233 CALIBRATION EVENT BANKS 8.6 CTPD Bank - Central Calorimeter Temperature Probe Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CTPD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 234 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to bank CEMD, with the omission of the cluster width bits, all the geometry bits but the azimuth, and addition of bits for the probe number. Bits 0-3 Probe Number (0-9) Bits 4-5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 235 CALIBRATION EVENT BANKS 8.7 CTPX Bank - Central Calorimeter Temperature Probe MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CTPX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel CDF-152 Page 236 CALIBRATION EVENT BANKS ...... Error flag packed with next Logical Channel Address ...... The Error Flag is defined below. Zero always implies good data. The logical channel address is defined by analogy to bank CEMD, with the omission of the cluster width bits, all the geometry bits but the azimuth, and addition of bits for the probe number. Bits 0-3 Probe Number (0-9) Bits 4-5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 237 CALIBRATION EVENT BANKS 8.8 CSDD Bank - Central Calorimeter Cs-137 Source Drive Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CSDD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 238 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to bank CEMD, with the omission of the cluster width bits, all the geometry bits but the azimuth, and addition of bits for source drive data word. Bits 0-2 Source Drive Datum (0-3) Bits 3-5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 239 CALIBRATION EVENT BANKS 8.9 CSDX Bank - Central Calorimeter Cs-137 Source Drive MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CSDX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel CDF-152 Page 240 CALIBRATION EVENT BANKS ...... Error flag packed with next Logical Channel Address ...... The Error Flag is defined below. Zero always implies good data. The logical channel address is defined by analogy to bank CEMD, with the omission of the cluster width bits, all the geometry bits but the azimuth, and addition of bits for source drive data word. Bits 0-2 Source Drive Datum (0-3) Bits 3-5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 241 CALIBRATION EVENT BANKS 8.10 CCDD Bank - Central Calorimeter Digital Data Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CCDD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 242 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to bank CEMD, with the omission of the cluster width bits, all the geometry bits but the azimuth, and addition of bits for digital register. Bits 0-3 Digital Register (0-9) Bits 4-5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 243 CALIBRATION EVENT BANKS 8.11 CECD Bank - Central EM Calorimeter Current Channel Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CECD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 244 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. .lt Bit 0 Unused Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-9) Bits 6-10 Azimuth Segmentation (0-23) CDF-152 Page 245 CALIBRATION EVENT BANKS 8.12 CHCD Bank - Central Hadron Calorimeter Current Channel Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CHCD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 246 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. .lt Bit 0 Unused Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-7) Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 247 CALIBRATION EVENT BANKS 8.13 WHCD Bank - Endwall Calorimeter Current Channel Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "WHCD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 248 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. Bit 0 Unused Bit 1 PhotoMultiplier Tube (0-1) Bits 2-5 Rapidity Segmentation (0-5) Bits 6-10 Azimuth Segmentation (0-23) CDF-152 Page 249 CALIBRATION EVENT BANKS 8.14 LSAD Bank - Hadron Calorimeter Laser System ADC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "LSAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 1 No. of Blocks 1 3 Block Pointer 2 End of Data Pointer 3 Data ...... etc. 1. No. of Blocks. Corresponds to just one Block. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bit 1 Unused Bits 2-5 Phototube No. Bits 6-10 Box No. Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) CDF-152 Page 250 CALIBRATION EVENT BANKS 2. Channel contents. 16 Bit ADC value (normalised to ??) CDF-152 Page 251 CALIBRATION EVENT BANKS 8.15 LSTD Bank - Hadron Calorimeter Laser System TDC Bank This Bank has the following Bank Header Characteristics:- Bank Name : "LSTD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 1 No. of Blocks 1 3 Block Pointer 2 End of Data Pointer 3 Data ...... etc. 1. No. of Blocks. Corresponds to one block. 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0-1 Not used (zero) Bits 2-5 Phototube No. Bits 6-10 Box No. Bits 11-12 Unused Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit TDC value (normalised to ?????) CDF-152 Page 252 CALIBRATION EVENT BANKS 8.16 CPND Bank - Central EM Calorimeter PIN Diode Raw Data Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CPND" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The data for this block has the format (I*2): Logical Channel Address Channel Data Logical Channel Address Channel Data CDF-152 Page 253 CALIBRATION EVENT BANKS . . The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. .lt Bits 0-2 PIN Diode (0-5) Bits 3-4 QVC (0), TVC (1), Ratio (2), Spare (3) Bit 5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused CDF-152 Page 254 CALIBRATION EVENT BANKS 8.17 CPNX Bank - Central EM Calorimeter PIN Diode MX Calibration Summary Bank This Bank has the following Bank Header Characteristics:- Bank Name : "CPNX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) where the format of the data is:- Displacement (I*4) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. No. of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*4 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*4 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to Wedge West 0 (and 1 if two wedges are present). The Data for each Block has the format: Error flag packed with Logical Channel Address Calibration data for this channel CDF-152 Page 255 CALIBRATION EVENT BANKS ...... Error flag packed with next Logical Channel Address ...... The Error Flag can be run type dependent and will be defined later. However, zero implies good data. The logical channel address is defined by analogy to CDF-152, with the omission of the cluster width bits. Bits 0-2 PIN Diode (0-5) Bits 3-4 QVC (0), TVC (1), Ratio (2), Spare (3) Bit 5 Unused Bits 6-10 Azimuth Segmentation (0-23) Bits 11-15 Unused The calibration data is dependent on run type: Pedestal Run Type: Word 0: upper 16 bits: Error Flag, lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean Pedestal in counts*64 Word 3: Pedestal Sigma**2 in counts**2*64 Flasher Run Type Word 0: upper 16 bits: Error Flag lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean PIN Diode Response in counts*64 Word 3: PIN Diode Sigma**2 in counts**2*64 LED Run Type (0,1 or 2) Word 0: upper 16 bits: Error Flag lower 16 bits: Logical channel address Word 1: upper 16 bits: spare lower 16 bits: Number of Reads on this subaddress Word 2: Mean PIN Diode Response in counts*64 Word 3: PIN Diode Sigma**2 in counts**2*64 CDF-152 Page 256 CALIBRATION EVENT BANKS 8.18 SVXX Bank - Silicon Vertex Detector Xmode Data Bank This format describes the SVXX bank, which contains Xmode data from the SVX Detector. It is defined to be used with the FastBus based readout electronics A typical readout configuration assumes 1 Scanner (SSP) and 1 Sequencer sitting in one FB crate. The data is divided into sequencers (0-3), and subdivided into wedges (0-23). A single SVXX bank will contain data for at most 1 wedge from each of the sequencers, giving a maximum total of 4 wedges per SVXX bank. To read out the entire detector, a total of 6 consecutive SVXX banks are needed. The first bank will contain data for wedges 0, 6, 12, and 18. The second for wedges 1, 7, 13, and 19, and so on. This Bank has the following Bank Characteristics:- Bank Name : "SVXX" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The format of the header is:- Type Displacement Contents Description -------------------------------------------------------------------------------- I*4 0 NBLOCK=28 Number of Blocks .......... Sequencer 0 ........... I*4 1 IPSEQ0 Offset to Sequencer 0 Description Block (Block 0) I*4 2 IPWD00 Offset to Wedge 0 (West side, number 0) (Block 1) I*4 3 IPWD01 Offset to Wedge 1 (West side, number 1) (Block 2) I*4 4 IPWD02 Offset to Wedge 2 (West side, number 2) (Block 3) I*4 5 IPWD03 Offset to Wedge 3 (West side, number 3) (Block 4) I*4 6 IPWD04 Offset to Wedge 4 (West side, number 4) (Block 5) I*4 7 IPWD05 Offset to Wedge 5 (West side, number 5) (Block 6) .......... Sequencer 1 ........... I*4 8 IPSEQ1 Offset to Sequencer 1 Description Block (Block 7) I*4 9 IPWD06 Offset to Wedge 6 (West side, number 6) (Block 8) I*4 10 IPWD07 Offset to Wedge 7 (West side, number 7) (Block 9) I*4 11 IPWD08 Offset to Wedge 8 (West side, number 8) (Block 10) I*4 12 IPWD09 Offset to Wedge 9 (West side, number 9) (Block 11) I*4 13 IPWD10 Offset to Wedge 10 (West side, number 10) (Block 12) I*4 14 IPWD11 Offset to Wedge 11 (West side, number 11) (Block 13) .......... Sequencer 2 ........... I*4 15 IPSEQ2 Offset to Sequencer 2 Description Block (Block 14) I*4 16 IPWD12 Offset to Wedge 12 (East side, number 0) (Block 15) I*4 17 IPWD13 Offset to Wedge 13 (East side, number 1) (Block 16) I*4 18 IPWD14 Offset to Wedge 14 (East side, number 2) (Block 17) I*4 19 IPWD15 Offset to Wedge 15 (East side, number 3) (Block 18) I*4 20 IPWD16 Offset to Wedge 16 (East side, number 4) (Block 19) CDF-152 Page 257 CALIBRATION EVENT BANKS I*4 21 IPWD17 Offset to Wedge 17 (East side, number 5) (Block 20) .......... Sequencer 3 ........... I*4 22 IPSEQ3 Offset to Sequencer 3 Description Block (Block 21) I*4 23 IPWD18 Offset to Wedge 18 (East side, number 6) (Block 22) I*4 24 IPWD19 Offset to Wedge 19 (East side, number 7) (Block 23) I*4 25 IPWD20 Offset to Wedge 20 (East side, number 8) (Block 24) I*4 26 IPWD21 Offset to Wedge 21 (East side, number 9) (Block 25) I*4 27 IPWD22 Offset to Wedge 22 (East side, number 10) (Block 26) I*4 28 IPWD23 Offset to Wedge 23 (East side, number 11) (Block 27) I*4 29 Offset to the Last Data Word + 1 ================================================================================ ================================================================================ There are a total of four Sequencer Description Blocks, located in blocks 0, 7, 14, and 21. Each of the blocks describes the data for one sequencer. Sequencers are numbered from i=0 to 3. The wedges in Sequencer i are numbered j+(i*6), where j=0,5. The End-of-Buffer Register contains the address of the last location in the Sequencer's Event Memory to which a data word was written. In order to get the number of data words in a given wedge you must add 1 to the content of this register. Sequencer Description Blocks Format: Type Displacement Contents Description -------------------------------------------------------------------------------- Blocks 0,7,14,21 -------------------------------------------------------------------------------- I*4 IPSEQi LWEDGEj End-of-Buffer Register for Wedge j, Sequencer i I*4 IPSEQi+1 LWEDGEj+1 End-of-Buffer Register for Wedge j+1, Sequencer i ... ........ ........ I*4 IPSEQi+5 LWEDGEj+5 End-of-Buffer Register for Wedge j+5, Sequencer i I*4 IPSEQi+6 End-of-Buffer Register for Block 6 I*4 IPSEQi+7 End-of-Buffer Register for Block 7 I*4 IPSEQi+8 Execution Timer (C000-0008) I*4 IPSEQi+9 SVX Status (C000-0009) I*4 IPSEQi+10 Wedge Priority (C000-000A) I*4 IPSEQi+11 Wedge Priority Mask (C000-000B) I*4 IPSEQi+12 External Conditions (C000-000C) I*4 IPSEQi+13 Instruction Execution Monitor (C000-000D) I*4 IPSEQi+14 ICIPi Controller ID Register for Sequencer i I*4 IPSEQi+15 ICEPi Controller Error Register for Sequencer i I*4 IPSEQi+16 ICPPi Controller Priority Mask Register for Sequencer i I*4 IPSEQi+17 ICDPi Controller Diagnostic Register for Sequencer i ================================================================================ ================================================================================ There are a total of 24 Wedge Data Blocks, located in blocks 1-6, 8-13, 15-20, CDF-152 Page 258 CALIBRATION EVENT BANKS and 22-27. Each of the blocks describes the data for one wedge. Preceeding the Channel Data Words are SVXDCN Wedge Control Words, 60 HiLo Control Words, another SVXDCN Wedge Control Words, and SVXXCN Xmode Control Words. If a block contains valid data, it should contain data for exactly 1920 channels. The current SVXX uses SVXDCN=14, SVXXCN=5 (see note 4). Wedge Data Blocks Format: Type Displacement Contents (lower 16 bits) Description -------------------------------------------------------------------------------- Blocks 1 to 27 (excluding blocks 0, 7, 14, and 21) -------------------------------------------------------------------------------- I*4 IPWDnn FFFFx Fixed Control Word for wedge nn I*4 IPWDnn+1 AAAAx Fixed Control Word for wedge nn I*4 IPWDnn+2 5555x Fixed Control Word for wedge nn I*4 0000x Fixed Control Word for wedge nn I*4 VCAL1 Charge injection DAC 1 I*4 VCAL2 Charge Injection DAC 2 I*4 OFFDAC Offset DAC I*4 CSR1 Digitizer settings, eg. gain I*4 DigGPR General Purpose register I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 IPWDnn+13 DESR Digitizer Error Status Register I*4 IPWDnn+SVXDCN first HiLo Control Word for wedge nn ... I*4 IPWDnn+SVXDCN+59 last HiLo Control Word for wedge nn I*4 IPWDnn+SVXDCN+60 0000x Fixed Control Word for wedge nn I*4 AAAAx Fixed Control Word for wedge nn I*4 5555x Fixed Control Word for wedge nn I*4 FFFFx Fixed Control Word for wedge nn I*4 VCAL1 Charge injection DAC 1 I*4 VCAL2 Charge Injection DAC 2 I*4 OFFDAC Offset DAC I*4 CSR1 Digitizer settings, eg. gain I*4 DigGPR General Purpose register I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 junk...(see note 4) I*4 DESR Digitizer Error Status Register I*4 IPWDnn+2*SVXDCN+60 VCAL1 VCAL1 cross-check I*4 VCAL2 VCAL2 cross-check I*4 ADC offset I*4 # of Xmode triggers I*4 CHNWRD # of words per channel I*4 IPWDnn+2*SVXDCN+SVXXCN First dataword for for first channel CDF-152 Page 259 CALIBRATION EVENT BANKS ... ...... ................................... I*4 IPWDnn+LWEDGEnn-1 Last dataword for last channel -------------------------------------------------------------------------------- ================================================================================ Notes: -------------------------------------------------------------------------------- 1. All words are I*4 type. -------------------------------------------------------------------------------- 2. IPWDnn, the offset to the Wedge Data Block for wedge nn, points to the first word in the block (a Fixed Control Word), not to the first Channel Data Word. -------------------------------------------------------------------------------- 3. Channel Data Words are 32 bit integer words. There should be exactly CHNWRD words per channel. There should be exactly 1920 channels per wedge in a block containing valid data. For efficiency and threshold calculations, CHNWRD=1. I*4 IPWDnn+2SVXDCN+SVXXCN # of latches for first channel I*4 IPWDnn+2SVXDCN+SVXXCN+1 # of latches for second channel ... ...... .................................. I*4 IPWDnn+LWEDGEnn # of latches for last channel For all other calculations, CHNWRD=2. I*4 IPWDnn+2SVXDCN+SVXXCN Sum of ADC counts for first channel I*4 IPWDnn+2SVXDCN+SVXXCN+1 Sum of (ADC counts)**2 for first channel I*4 IPWDnn+2SVXDCN+SVXXCN+2 Sum of ADC counts for second channel ... ...... ................................... I*4 IPWDnn+LWEDGEnn Sum of (ADC counts)**2 for last channel -------------------------------------------------------------------------------- 4. The beginning of each Wedge Data Block contains SVXDCN Wedge Control Words from the Digitizer's internal registers. SVXDCN is stored as a parameter in C$INC:??????.INC (desn't exist). Its value corresponds to the number of control words at the beginning of each Wedge Data Block. Four Fixed Control Words are used for diagnostics, and six Control Words are used for calibration. As of Dec 14, 1991: SVXDCN=14. Before Dec 14, 1991: SVXDCN=12. Following the Wedge Control Words are the HiLo Control Words, another SVXDCN Wedge Control Words, and SVXXCN Xmode Control Words. SVXXCN is stored as a parameter in C$INC:??????.INC (desn't exist). Currently, SVXXCN=5. Wedge Control Words are 32 bit words composed of the following fields: LSB: Bits 0-15 data for this subaddress Bits 16-19 A = subaddress Bits 20-22 IDB = control word ID bits Bits 23-26 CID = Fake Readout Chip ID in daisy chain = 15 Bits 27-29 N = Digitizer Number (ADC Module number) (0-5) CDF-152 Page 260 CALIBRATION EVENT BANKS MSB: Bits 30-31 C = Crate/Controller Number (0-3) bit |3 3| | | 2| | 1 | # |1 0|9 8 7|6 5 4 3|2 1 0|9 8 7 6|5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0| ------+---+-----+-------+-----+-------+-------------------------------+ | | | CID | | | | value | C | N |1 1 1 1| IDB | A | data | NOTE: Bits 23-26 are always on for Wedge Control Words, corresponding to a Fake Chip ID of 15. -------------------------------------------------------------------------------- 5. The HiLo Control Words have the following format: Type Displacement Contents -------------------------------------------------------------------------------- I*4 IPWDnn+SVXDCN SVX register A8 for HiLo High for chip 00 of wedge nn SVX register A9 for HiLo High for chip 00 of wedge nn SVX register A8 for HiLo Low for chip 00 of wedge nn SVX register A9 for HiLo Low for chip 00 of wedge nn SVX register A8 for HiLo Low for chip 01 of wedge nn ..... SVX register A9 for HiLo Low for chip 14 of wedge nn HiLo Control Words are 32 bit words, in the same format as Wedge Control Words. The data sections (lower 16 bits) of the HiLo Control Words have the following format: bit | 1 1 | | | | # | 5 4 3 2 1 0 9 8 7 | 6 | 5 4 | 3 2 1 0| ------+-----------------------------------+---+-------+--------------+ A8 Hi | | | | | value |CNV SCA SCI 0 TC1 HL1 WE1 RE1 NM |TM | 0 0 | line status | | | | | | A9 Hi | | | | | value | 0 0 0 0 0 0 0 PR NM |TM | 0 0 | CID | | | | A8 Lo | | | value |CNV SCA SCI 0 TC1 HL1 WE1 RE1 LA | 0 0 0 0 0 0 0 | | | | A9 Lo | | | value | 0 0 0 0 0 0 0 PR LA | 0 0 0 0 0 0 0 | CID = Readout Chip ID in daisy chain (0-14) TM = Threshold Mode: 1=positive, 0=negative NM = Neighbor Mode: 1=nbr logic, 0=no nbr logic RE1 = 0 WE1 = 1 HL1 = HiLo cycle: 1=Hi, 0=Lo TC1 = 0 SCI = 0 SCA = 0 CNV = 0 CDF-152 Page 261 CALIBRATION EVENT BANKS There are four HiLo Control Words for each chip in a given wedge, for a total of sixty HiLo Control Words per wedge. -------------------------------------------------------------------------------- 6. Controller Register Words are 32 bit words, in the same format as Wedge Control Words. CDF-152 Page 262 CALIBRATION EVENT BANKS 8.19 CMXX Bank - Central Muon Extension Calibration Summary Bank This bank contains calibration summary information from the Central Muon Extension wires for a number of events taken at a particular delay setting. The overall structure is similar to the CMXD bank, however there are multiple words of information for each wire, and there is information for every wire in the chamber. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each region. There are 8 such pointers. Each of the eight 90-degree quarter-sections (QS) is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. There are exactly four words of data for each and every wire, regardless of the actual number of TDC hits observed in each event. _______ ________ Address Contents _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ INDDAT+0 | Number of pointers | Quarter-section pointer block +2 | PQS# = pointers to | . | each QS | __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | QSL0 | Nevt/Ncells | Block B0 QSL0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for QS 0 __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | QSL0 + PC0 | Data for TDC 0 | Block B1 . | " | . | | Data for QS 0 QSL0 + PCN | Data for TDC N | . | " | . | | __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | QSL1 | Nevt/NTDCs | TDC pointer block . | Pointers | for QS 1 __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | CDF-152 Page 263 CALIBRATION EVENT BANKS . | Data | . | | _____ __ _______________ _______ _____ Block A: Quarter-Section Pointer Block ____ ________ Word Contents 0 NQS = # of Quarter-Sections (8) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NQS-1 = pointer to end of YBOS bank + 1 for i = NQS _____ ______ ___ _______ _________ ___ _______________ _ Block B0(i): TDC pointer sub-block for Quarter-Section i ____ ________ Word Contents 0 Number of events/NTDC(i) Number of events (bits 15-31) = Number of events taken NTDC(i)(bits 0-7) = # of TDCsin QS i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) Each cell has an entry in this pointer block even if there is no hit data. _____ ________ ___ ____ _________ ___ _______________ __ Block B1(i,j): Hit data sub-block for Quarter-Section i, ___ _ TDC j TDC data have the following format. word 0: bits 0- 4 TDC slot number 5-11 TDC channel number 12-18 TDC crate number 19-23 wire number 24-27 pointer to first data word for next wire 28-31 reserved for failure code (filled in offline) word 1: bits 0-15 Sum of first leading edge time for each event (including phase) bits 16-31 Sum of widths of first hit for each event word 2: Sum of squares of first leading edge time for each event word 3: bits 0-15 Total number of hits observed CDF-152 Page 264 CALIBRATION EVENT BANKS bits 16-31 Total number of events with at least one hit CDF-152 Page 265 CALIBRATION EVENT BANKS 8.20 CMPX Bank - Central Muon Upgrade Calibration Summary Bank This bank contains calibration summary information from the Central Muon Upgrade wires for a number of events taken at a particular delay setting. The overall structure is similar to the CMPD bank, however there are multiple words of information for each wire, and there is information for every wire in the chamber. The structure of the YBOS raw data bank is shown in the diagram below. The standard YBOS header is followed by a control block, A, with pointers to the start of information from each region. There are four such pointers. Each of the four regions (RS) is organized as a sub-block of pointers, B0, directly followed by a sub-block of wire hit data, B1. There are exactly four words of data for each and every wire, regardless of the actual number of TDC hits observed in each event. _______ ________ Address Contents _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ INDDAT+0 | Number of pointers | Region pointer block +2 | PRS# = pointers to | . | each RS | __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | RSL0 | Nevt/Ncells | Block B0 RSL0+1 | PC# = TDC pointers | . | " " | TDC pointer block . | " " | for RS 0 __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | RSL0 + PC0 | Data for TDC 0 | Block B1 . | " | . | | Data for RS 0 RSL0 + PCN | Data for TDC N | . | " | . | | __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | RSL1 | Nevt/NTDCs | TDC pointer block . | Pointers | for RS 1 __ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . |_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ | CDF-152 Page 266 CALIBRATION EVENT BANKS . | Data | . | | _____ __ ______ _______ _____ Block A: Region Pointer Block ____ ________ Word Contents 0 NRS = # of Regions (4) = # of pointer words - 1 1+i Pointers: = pointer to word 0 of block B0(i) for 0 < i < NRS-1 = pointer to end of YBOS bank + 1 for i = NRS _____ ______ ___ _______ _________ ___ ______ _ Block B0(i): TDC pointer sub-block for Region i ____ ________ Word Contents 0 Number of events/NTDC(i) Number of events (bits 15-31) = Number of events taken NTDC(i)(bits 0-7) = # of TDCsin RS i 1+j Pointers: = pointer to start of TDC j for 0 < j < NTDC(i) - 1 = pointer to "end-of-block + 1" for j = NTDC(i) Each cell has an entry in this pointer block even if there is no hit data. _____ ________ ___ ____ _________ ___ ______ __ ___ _ Block B1(i,j): Hit data sub-block for Region i, TDC j TDC data have the following format. word 0: bits 0- 4 TDC slot number 5-11 TDC channel number 12-18 TDC crate number 19-23 wire number 24-27 pointer to first data word for next wire 28-31 reserved for failure code (filled in offline) word 1: bits 0-15 Sum of first leading edge time for each event (including phase) bits 16-31 Sum of widths of first hit for each event word 2: Sum of squares of first leading edge time for each event word 3: bits 0-15 Total number of hits observed bits 16-31 Total number of events with at least one hit CDF-152 Page 267 TEST BEAM DATA BANKS 9 TEST BEAM DATA BANKS This section describes the data structure for banks which are only produced by the CDF Test Beam data acquisition system. These banks should not appear in the output data stream from the CDF detector. The organization of these banks is identical to that of the detector component banks in Section 7 of this note and the bank component numbers are unique. CDF-152 Page 268 TEST BEAM DATA BANKS 9.1 UEMD Bank - Plug Upgrade EM Calorimeter Bank This Bank has the following Bank Header Characteristics:- Bank Name : "UEMD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. ______ Notes: 1. Number of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to UEM West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits CDF-152 Page 269 TEST BEAM DATA BANKS ..... Channel contents 16 bits 1. ClusterWidth/StartChannel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bits 1-2 Azimuthal Sub-segmentation(0-3) 0-3 if 0<=eta tower number<= 7 [8 eta towers] 0-1 if 8<=eta tower number<=13 [6 eta towers] 0 if 14<=eta tower number<=17 [4 eta towers] Bits 3-7 Rapidity Segmentation (0-17) Bits 8-12 Azimuth Segmentation (0-23) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 270 TEST BEAM DATA BANKS 9.2 UHAD Bank - Plug Upgrade HAD Calorimeter Bank This Bank has the following Bank Header Characteristics:- Bank Name : "UHAD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. 1. Number of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to UHA West 0 (and 1 if two wedges are present). The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits ..... Channel contents 16 bits CDF-152 Page 271 TEST BEAM DATA BANKS 1. ClusterWidth/StartChannel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of the following fields:- Bit 0 x16 (0) or x1 (1) Gain Bits 1-2 Azimuthal Sub-segmentation(0-3) 0-3 if 0<=eta tower number<= 7 [8 eta towers] 0-1 if 8<=eta tower number<=13 [6 eta towers] 0 if 14<=eta tower number<=17 [4 eta towers] Bits 3-7 Rapidity Segmentation (0-17) Bits 8-12 Azimuth Segmentation (0-23) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit ADC value (normalised to nanoCoulombs). CDF-152 Page 272 TEST BEAM DATA BANKS 9.3 UECD Bank - Plug Upgrade EM Calorimeter Currents Bank This Bank has the following Bank Header Characteristics:- Bank Name : "UECD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. ______ Notes: 1. Number of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to UEM West 0 (and 1 if two wedges are present). The Data for each Block has the format (I*2) : Logical Channel Address Channel contents CDF-152 Page 273 TEST BEAM DATA BANKS Logical Channel Address Channel contents .......... 1. Logical Channel Address is defined by analogy to CDF152, and it has no cluster width bits. Bit 0 x16 (0) or x1 (1) Gain Bits 1-2 Azimuthal Sub-segmentation(0-3) 0-3 if 0<=eta tower number<= 7 [8 eta towers] 0-1 if 8<=eta tower number<=13 [6 eta towers] 0 if 14<=eta tower number<=17 [4 eta towers] Bits 3-7 Rapidity Segmentation (0-17) Bits 8-12 Azimuth Segmentation (0-23) 2. Channel contents. 16 Bit value (normalised to nanoCoulombs). CDF-152 Page 274 TEST BEAM DATA BANKS 9.4 UHCD Bank - Plug Upgrade HAD Calorimeter Currents Bank This Bank has the following Bank Header Characteristics:- Bank Name : "UHCD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. ______ Notes: 1. Number of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. 4. For the special case of the beamline tests, where only one or two Wedge Modules are present, the number of blocks may be set to 1 and the number of block pointers set to 2 (pointer to 1st block and end of data pointer). In this case the Wedge corresponds always to UHA West 0 (and 1 if two wedges are present). The Data for each Block has the format (I*2) : Logical Channel Address Channel contents CDF-152 Page 275 TEST BEAM DATA BANKS Logical Channel Address Channel contents .......... 1. Logical Channel Address is defined by analogy to CDF152, and it has no cluster width bits. Bit 0 x16 (0) or x1 (1) Gain Bits 1-2 Azimuthal Sub-segmentation(0-3) 0-3 if 0<=eta tower number<= 7 [8 eta towers] 0-1 if 8<=eta tower number<=13 [6 eta towers] 0 if 14<=eta tower number<=17 [4 eta towers] Bits 3-7 Rapidity Segmentation (0-17) Bits 8-12 Azimuth Segmentation (0-23) 2. Channel contents. 16 Bit value (normalised to nanoCoulombs). CDF-152 Page 276 TEST BEAM DATA BANKS 9.5 UEPD Bank - Plug Upgrade EM Calorimeter Position Detector This Bank has the following Bank Header Characteristics:- Bank Name : "UEPD" Bank Number : 1 Bank Type : BNKTI2 (Integer*2) where the format of the data is:- Displacement (I*2) Contents Description 0 24 No. of Blocks 1 26 West Modules 0-1 Pointer ...... 12 West Modules 22-23 Pointer 13 East Modules 0-1 Pointer ...... 24 East Modules 22-23 Pointer 25 End of Data Pointer 26 Data for West Modules 0-1 ...... etc. ______ Notes: 1. Number of Blocks. Corresponds to the West Modules and then the East Modules taken in pairs (12 West, 12 East). 2. Block Pointers. These specify the Integer*2 displacement of the data for the relevant block relative to the Bank Data Index. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the next Integer*2 displacement past the end of the data. Used to calculate the wordcount for the last Block. The Data for each Block has the format:- Cluster Width/Start Channel 16 bits Channel contents 16 bits .... Channel contents 16 bits 1. Cluster Width/Start Channel. 16 Bit word specifying the width of the cluster and the first Channel identifier in the cluster. This word is composed of CDF-152 Page 277 TEST BEAM DATA BANKS the following fields:- Bits 0-4 Channels in D(phi)=15 deg (0-31) Bit 5-6 Phototube in D(phi)=15 deg (0-3) Bit 7 dimensions, "a" (0) or "b" (1) Bits 8-12 Module Number (0-23) Bits 13-15 Cluster Width (0-7==>1-8) 2. Channel contents. 16 Bit value (normalised to nanoCoulombs). CDF-152 Page 278 TEST BEAM DATA BANKS 9.6 SABD Bank - Small Angle Beam Test Data This bank has the TDC data for the test beam chambers and the small angle prototype drift chamber. Bank History ____________ 15-Sep-1987 NG Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "SABD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The SABD bank format is: Address Contents -------- ------------------------------ ! ! Block A INDDAT+0 ! Number of SL pointers ! +1 ! PSL0 = pointer to SL 0 ! Super Layer pointer +2 ! PSL1 = pointer - end of bank ! block ! + 1 ! ---------------------------- ! ! PSL0 ! Number of TDCs ! Block B0(0) PSL0+1 ! PC0 = pointer to TDC 0 ! PSL0+2 ! PC1 = pointer to "end_of_ ! TDC pointer block ! block + 1" ! for Super Layer 0 ! ! ---------------------------- ! ! Block B1(0,0) PSL0 + PC0 ! Data for TDC 0 ! ! ! Data for Super Layer 0 ! ! ! ! CDF-152 Page 279 TEST BEAM DATA BANKS Block A : Super Layer Pointer Block ----------------------------------- Word Contents ------- ------------------------------------------------- 0 NSL = # of Super Layers(1) = # of pointer words - 1 1+i Pointers = pointer to word 0 of block B0(0) for for 0 < i < NSL-1 = pointer to end of YBOS bank + 1 for i = NSL Block B0(0) : TDC pointer sub_block for Super - Layer 0 -------------------------------------------------------- Word Contents ----- ----------------------------------------------------- 0 NTDC(0) = number of TDCs in Super - Layer 0 = 1 1+j Pointers = pointer to start of TDC i for 0 < j < NTDC(i)-1 = pointer to "end-of-block + 1" for j=NTDC(i) The same comments as for the corresponding block of the CTCD bank apply to this block. Block B1(0,0) : TDC hit data sub_block for Super_Layer 0, TDC 0 --------------------------------------------------------------- 1) TDC data have the same format as in the CTCD bank i.e: bits 0 -> 9 T = Leading edge of TDC count '' 10 -> 18 L = Trailing edge clock count ( 9 bits, aligned with bits 1 -> 9 ) '' 19 -> 25 C = Channel number within this TDC ( 0 : 95 are "legal" channels ) '' 30 N = Flag bit, indicating that the data on this wire were not completely read out. '' 31 S = Stop bit = 1 for last hit on this wire 2) TDC channels 0 -> 15 are reserved for the 16 wires of the test beam chambers. Channels 16 -> 31 are empty. Channels 32 -> 37 are reserved for the wires and the delay line signals of the prototype small angle chamber. 3) The same comments as for the corresponding block of the CTCD bank apply to this block. CDF-152 Page 280 TEST BEAM DATA BANKS Notes: 1. For this bank the name "Super Layer" refers to data organization rather than physical structure of the hardware detector. 2. Minimum (Maximum) bank length = 3 (1446) I*4 words. CDF-152 Page 281 TEST BEAM DATA BANKS 9.7 LSCD Bank - Test Beam Latch And Scaler Data Bank This bank has the test beam scaler and latch module data Bank History ____________ 15-Sep-1987 NG Original Creation This Bank has the following Bank Header Characteristics:- Bank Name : "LSCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The LSCD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- INDDAT+0 Number of blocks ( = 2 ) 1 P0 Pointer to block 0 - Scaler Data 2 P1 Pointer to block 1 - Latch Data 3 P2 Pointer to end of data ----------------------------------------------------------------- Data for Block 0 ----------------------------------------------------------------- P0 Data for 1st channel - Scaler Module # 1 P0+1 Data for 2nd channel - Scaler Module # 1 . . . . . . P0+31 Data for 32nd channel - Scaler Module # 1 ----------------------------------------------------------------- Data for Block 1 ----------------------------------------------------------------- P1 Latch Bits 1 -> 32 P1+1 Latch Bits 33 -> 64 Notes: 1. Both the scaler and the latch block data are 32 bit words. 2. The exact content of the scaler and the latch channels is not known yet. CDF-152 Page 282 TEST BEAM DATA BANKS 3. Minimum (Maximum) bank length = 38 (38) I*4 words. CDF-152 Page 283 TEST BEAM DATA BANKS 9.8 TBCD Bank - Test Beam Camac Data Bank This bank contains data read out from the Test-beam CAMAC crate thru the Struck 320. Block 0 contains test status words. Blocks 1-2 are the CAMAC ADC and TDC data for the small angle prototype scintillators. Bank History ____________ 7-Oct-1987 DB Original Creation 21-Oct-1987 NG Add blocks 1-2 The TBCD bank header values are: Bank Name : "TBCD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TBCD bank format is: Displacement (I*4) Contents Description 0 3 No. of Blocks 1 P0 Pointer to block 0 containing CAMAC words 2 P1 Pointer to block 1 - ADC Data 3 P2 Pointer to block 2 - TDC Data 4 End of Data Pointer -------------------------------------------------------------- Data for Block 0, CAMAC status words -------------------------------------------------------------- P0 CS (Clear and Strobe) width word P0+1 Trigger mask word P0+2 Not used P0+3 Magnet shunt reading ----------------------------------------------------------------- Data for Block 1 - Small Angle ADC Data ----------------------------------------------------------------- P1 Data for 1st channel - ADC Module # 1 P1+1 Data for 2nd channel - ADC Module # 1 . . . . . . . . P1+11 Data for 12th channel - ADC Module # 1 ------------------------------------------------------------------ Data for Block 2 - Small Angle TDC Data ----------------------------------------------------------------- P2 Data for 1st channel - TDC Module # 1 P2+1 Data for 2nd channel - TDC Module # 1 . . . . . . . . P2+7 Data for 8th channel - TDC Module # 1 ------------------------------------------------------------------ CDF-152 Page 284 TEST BEAM DATA BANKS Notes: 1. The CS (Clear and Strobe) gate width word bit field definition: Bits Contents ---- -------- 0:09 M mantissa 10:12 C charactistic 13 L latch bit 14:15 D delayed pulse width The CS width is according to the delay set by the 2323 CAMAC delay gate generator. This is given by Duration = M*10**C in nanoseconds for L=0. L=1 is for latch mode, and is not used. The pulse has a width of: D=0 10 ns 1 30 ns 2 100 ns 3 300 ns 2. The trigger mask word has bit 0=1 for beam, bit 1=1 for muons, and bit 2=1 for pedestal/calibration triggers. 3. Shunt word contains the digitized shunt reading. 4. The ADC in Block 1 is a LeCroy 2249A. It has 10-bit resolution. The ADC block data are 32-bit words. 5. The TDC in Block 2 is a LeCroy 2228A. It has 11-bit resolution. The TDC block data are 32-bit words. 6. The 1st channel, of both the ADC and TDC in blocks 1-2, has the data from the upstream scintillator. The second channel has the data from the downstream scintillator. The other channels are empty. 7. Fixed bank length = 5 + 4 + 12 + 8 = 29 I*4 words. CDF-152 Page 285 TEST BEAM DATA BANKS 9.9 TBSD Bank - Test Beam Stand Positions Data Bank This bank contains the positions of the test beam calorimeter stands, read out of the CAMAC PC thru the Struck 320 (FASTBUS branch driver). Bank History ____________ 21-May-1990 BD Original Creation The TBSD bank header values are: Bank Name : "TBSD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The TBSD bank format is: Displacement Contents Description -------------- ---------- ------------- 0 1 Number of blocks 1 3 Pointer to first block of data 2 12 Pointer to end of data 3 Error flag (see notes) 4 Position conversion factor (see notes) 5 Position of Forward Horizontal axis 6 Position of Forward Vertical axis 7 Position of Wedge Horizontal axis 8 Position of Wedge Vertical axis 9 Position of Plug Horizontal axis 10 Position of PHA Vertical axis 11 Position of PEM Rotational axis CDF-152 Page 286 TEST BEAM DATA BANKS Notes: 1. The "Error flag" word should be tested for each event. If it is non-zero then the stand position data is not valid and should not be used. If it is non-zero, then the bit pattern provides a diagnostic indication of why the position read-out failed. 2. The axis positions are multiplied by a conversion factor and then recorded as integers. The positions should be divided by this conversion factor (be careful to insure that the division is done in Real arithmetic). Here is an example of converting the Plug horizontal axis position (note, if the Error flag is zero, then the conversion factor will be non-zero): PLUGH = IW(INDDAT+9) / FLOAT(IW(INDDAT+4)) CDF-152 Page 287 TEST BEAM DATA BANKS 9.10 SVTD Bank - SVX Temperature Detector Bank This bank contains the temperature readout information for the SVX east and west barrels. ____ _______ Bank History 17-Apr-1992 R. Hughes Original Version This Bank has the following Bank Header Characteristics:- Bank Name : "SVTD" Bank Number : 1 Bank Type : BNKTR4 (Real*4) The SVTD bank data format is: Displacement from data index Description ------------ ----------- 0 West Temp at Wedge 2 Layer 2 (DVM Ch 0) 1 West Temp at Wedge 8 Layer 2 (DVM Ch 1) 2 West Spare (DVM Ch 2) 3 West Temp at Wedge 9 Layer 4 (DVM Ch 3) 4 West Temp at Wedge 2 Layer 3 (DVM Ch 4) 5 West Temp at Wedge 2 Layer 1 (DVM Ch 5) 6 West Temp at Wedge 2 Layer 4 (DVM Ch 6) 7 West Temp at Wedge 8 Layer 3 (DVM Ch 7) 8 West Temp at Readout BH Wedge 6 Layer 4 (DVM Ch 8) 9 West Temp at Readout BH Wedge 8 Layer 2 (DVM Ch 9) 10 West Temp at Readout BH Wedge 2 Layer 4 (DVM Ch 10) 11 West Temp at Readout BH Wedge 8 Layer 4 (DVM Ch 11) 12 East Temp at Wedge 2 Layer 1 (DVM Ch 16) 13 East Temp at Wedge 2 Layer 2 (DVM Ch 17) 14 East Temp at Wedge 1 Layer 3 (DVM Ch 18) 15 East Temp at Wedge 2 Layer 4 (DVM Ch 19) 16 East Temp at Wedge 8 Layer 1 (DVM Ch 20) 17 East Temp at Dummy BH Wedge 5 Layer 4 (DVM Ch 21) 18 East Temp at Wedge 9 Layer 4 (DVM Ch 22) 19 East Temp at Readout BH Wedge 1 Layer 4 (DVM Ch 23) 20 East Temp at Readout BH Wedge 3 Layer 4 (DVM Ch 24) 21 East Temp at Readout BH Wedge 7 Layer 1 (DVM Ch 25) 22 East Temp at Readout BH Wedge 7 Layer 4 (DVM Ch 26) 23 East Temp at Dummy BH Wedge 1 Layer 4 (DVM Ch 27) Notes: CDF-152 Page 288 TEST BEAM DATA BANKS 1. Data is read from a Scanning DVM (2032) in CAMAC crate #1 in RR33H. 2. The conversion factor from SAM voltage to temperature is: 10 mV = 1 Degree Kelvin. 3. This bank has no block pointers at the beginning, the first word pointed to by the data index is the West Temp at Wedge 2 Layer 2. CDF-152 Page 289 TEST BEAM DATA BANKS 9.11 MAGD Bank - Test Beam MT5E-String Current Data This bank contains the current in the MT5E magnet string in the test beam. It is read from a SAM module thru the Struck 320 (FASTBUS branch driver). This reading of the current was implimented for use in low current (momentum) running Bank History ____________ 16-Aug-1990 BD Original Creation The MAGD bank header values are: Bank Name : "MAGD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The MAGD bank format is: Displacement Contents Description -------------- ---------- ------------- 0 1 Number of blocks 1 3 Pointer to first block of data 2 4 Pointer to end of data 3 Magnet current CDF-152 Page 290 TEST BEAM DATA BANKS Notes: 1. The magnet current is read from a SAM (Scanning ADC module), so the value is actually in VAX Real*4 format. The testbeam DAQ system is not setup to readout Real*4 data. This data bank can only be (easily) used on a VAX machine. CDF-152 Page 291 LEVEL 3 BANKS 10 LEVEL 3 BANKS This section describes the data structure for banks which are only used in the DAQ pipeline from Hardware Event Builder to Level 3 to the Buffer Multiplexor process. These banks normally do not appear in the event record output to tape or disk. Level 3 and the Buffer Multiplexor use these banks to verify the event record status in Level 3 memory and report results. YBOS banks produced by Level 3 algorithms are typically standard offline module banks and are not defined in this document. CDF-152 Page 292 LEVEL 3 BANKS 10.1 L3HD Bank - Level 3 Header Bank This bank has status words and record pointers used by Level 3 and the Buffer Multiplexor to access blocks of detector banks within the event record. Event data is transferred to/from Level 3 processors as a contiguous sequence of YBOS banks. The first bank in this event record is always L3HD. The event record produced by the hardware Event Builder is organized as blocks of YBOS banks preceeded by an exclusive word count: Address Contents 0 Exclusive 32-bit word count including bank L3HD and all blocks of YBOS banks. 1 Start of Bank L3HD with pointers (P0, P1, ...) to each block of YBOS banks. P0 Start of YBOS banks for block 0. . . . . . . . . P1 Start of YBOS banks for block 1. . . . . . . . . . . . . PN Start of YBOS banks for block N. . . . . . . . . The exclusive word count can be used to read the entire logical record including bank L3HD. Level3 node steering/control code uses information in bank L3HD to specify the type of action to be performed (program initialization, run initialization, event analysis, etc.) and the target YBOS array for each block or set of YBOS banks. Similarly, the Buffer Multiplexor can use this information to read blocks within the logical record. This Bank has the following Bank Header Characteristics:- Bank Name : "L3HD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The L3HD bank format is: Displacement CDF-152 Page 293 LEVEL 3 BANKS (I*4) Contents Description ------------ -------- ----------- 0 ACTYPE Type of algorithm entry to be executed 1 NB Number of Blocks 2 EVB status word 3 BFM event ID 4 Level 3 status word 5 P0 (=111) Offset of 1st word in block 0 6 LNG0 Length of block 0 7 ID of target YBOS array 8 Record type 9 Block Status word 10 P1 Offset of 1st word in block 1 11 LNG1 Length of block 1 12 ID of target YBOS array 13 Record type 14 Block Status word 15 P2 Offset of 1st word in block 2 . . . . . . . . . . . . . . . 100 P19 Offset of 1st word in block 19 . . . . . . . . . . . . . . . Notes: 1. L3HD is defined as a fixed length bank allowing a maximum of 20 data blocks. Since the total length of bank L3HD including YBOS header words is 110 I*4 words, block 0 always begins at offset P0=111. 2. Each block starts with the first word of the first YBOS bank in the block, i.e.,. the four character bank name. 3. YBOS displacements in the above L3HD bank definition are defined relative to the YBOS data index INDDAT. 4. Event records have the following absolute displacements: Displacement Contents 0 Exclusive word count 1 Bank name = 'L3HD' 2 Bank number = 1 3 Bank pointer = 0 CDF-152 Page 294 LEVEL 3 BANKS 4 Bank length = 106 5 Bank type = 3 (I*4) 6 First data word = ACTYPE - type of entry 5. ACTYPE specifies algorithm/module entry points which are called for the type of data in the input buffer. Level 3 supports the following data and corresponding entry points: ACTYPE Description 1 Grand initialization 2 Run initialization 3 Event analysis 4 End run 5 End job/program termination 25 Calibration & YHIST initialization. ACTYPE=25 has been used by Level 3 for separate calibration and YHIST initialization. 6. The fixed YBOS bank length allows a maximum of 20 blocks or sets of YBOS banks. 7. NB is the number of blocks of YBOS banks used in a particular logical record (Min = 1, Max = 20). Unused block entries in bank L3HD are set to zero by the EVB which creates bank L3HD. 8. Pointer words (P0, P1, etc.) are event record displacements relative to the first word transferred, i.e. the exclusive word count. 9. The block length (LNG#) is the number of I*4 words in a block. 10. Each block is transferred from the L3 input buffer (WIN) to a YBOS array with a call to BNREAD. Routine BNREAD is a Level 3 version of the standard YBOS BAREAD routine. The block length is passed to BNREAD as an input argument while BAREAD assumes the first word in the input array is the logical record or block length. Conversion from VAX to Motorola/IBM byte ordering can be done as necessary during this copy. 11. The node program copies all YBOS banks in an input block to a target YBOS array which is specified by the 3rd word in a bank L3HD block entry. The following YBOS primary and secondary arrays are currently supported: CDF-152 Page 295 LEVEL 3 BANKS Array ID in L3HD YBOS Array Name 1 BCS 2 CALII4 3 HBCS 4 ANPKI4 12. The BFM event ID is the event ID generated by the Buffer Manager and received by the Event Builder. 13. The Level 3 status word in L3HD is defined as follows: Bits Contents ---- -------- 0-23 Reserved for module status flags. 24 Node program unable to execute a YBOS read of a block in the event record. 25 Node failed to execute the Analysis Control modules. 26 Node unable to append new banks to the event record after completion of all filter modules. 27-31 Undefined. 14. "Record Type" specifies the type of data in one block or set of YBOS banks. DAQ record types are defined in RUN$LIBRARY:RECORD_TYPES.INC 15. The record received by Level 3 have multiple blocks with different record types, but all blocks in one logical record are associated with a single analysis control action as specified by ACTYPE. 16. The Block Status word has the following status flags: Bits Contents ---- -------- 0 Copy to target YBOS array complete. 1 Block with un-reformatted TDC banks. 2 Block with reformatted TDC banks generated by Level 3. 3 Block with filter module output banks generated by Level 3. 4 End of Data (ENDD) bank from Event Builder. 5:31 not used. The EVB sets Block Status = 0 (2) for normal (un-reformatted) YBOS banks. The algorithm executing on a Level 3 node sets Bit 0 after a block of banks has been copied to the target YBOS array. 17. The hardware EVB makes bank L3HD using information provided by each EVB reformatter module. Since this is done before the push to Level 3, the presence of CDF-152 Page 296 LEVEL 3 BANKS block pointers and word counts in L3HD is not sufficient to define a successful transfer. The EVB Status word in L3HD is rewritten after the push to Level 3 if an error occurs during the FASTBUS write operations. Bit assignments in the EVB status word are identical to the "Fastbus error" field in the EVCL trigger mask (see description of bits 5:9 in EVCL trigger mask). 18. The hardware EVB reads MX and SSP scanners on FASTBUS cable segments 82 and 84. The EVB normally produces event records with the follwoing L3HD block structure: Block 0 = Banks LRID and EVCL which are generated by the EVB. Block 1 = Segment 84 MX scanners and any SSP scanners which do not have raw tracking data. Block 2 = Segment 84 SSP scanners with raw un-reformatted LeCroy 1879 TDC banks (CTRD). Block 3 = Segment 82 MX scanners and any SSP scanners which do not have raw tracking data. Block 4 = Segment 82 SSP scanners with raw un-reformatted LeCroy 1879 TDC banks (VTRD, FTRD and SARD). Block 5 = End of Data Bank (ENDD). 19. The Level 3 algorithm which reformats LeCroy 1879 TDC data adds these banks to the end of the logical record and updates the next unused block entry in L3HD, e.g., block 6 in the above example. The record word count is updated, the number of blocks in L3HD (NB) is incremented and a pointer for the new block is added to L3HD. CDF-152 Page 297 LEVEL 3 BANKS 10.2 ENDD Bank - End Of Data Bank Bank ENDD is generated by the hardware EVB and output at the end of each event record. Block 0 is always present. It provides a few words which the Buffer Multiplexor uses to verify that the words output at the end of each record are consistent with the record length and structure defined in header bank L3HD. Blocks 1 and 2 should be empty for normal data acquisition. The hardware EVB can be instructed to generate a test pattern which can be used to check the EVB -> L3 -> Buffer Multiplexor data transfers. ____ _______ Bank History 26-Apr-1988 AB/TC Original version. This Bank has the following Bank Header Characteristics:- Bank Name : "ENDD" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The ENDD bank format is: Displacement (I*4) Contents Description ------------ -------- ----------- 0 3 Number of blocks 1 P0=5 Pointer to block 0, Event ID 2 P1 Pointer to block 1, pattern definition 3 P2 Pointer to block 2, test pattern 4 Pointer to end of data + 1 -------------------------------------------------------------- Data for Block 0, Event Identification -------------------------------------------------------------- P0 Event ID from BFM P0+1 Check word = 'AAAAAAAA' hex P0+2 Check word = '55555555' hex -------------------------------------------------------------- Data for Block 1, Test Pattern Definition -------------------------------------------------------------- P1 NPAT Number of I*4 pattern words P1+1 Base pattern word P1+2 Increment pattern word P1+3 Complement pattern flag CDF-152 Page 298 LEVEL 3 BANKS -------------------------------------------------------------- Data for Block 2, Test Pattern -------------------------------------------------------------- P2 Test pattern word 0 P2+1 Test pattern word 1 P2+2 Test pattern word 2 . . . . . . . . P2+NPAT-1 Test pattern word NPAT-1 Notes: 1. Bank ENDD is always generated with 3 blocks. Pointers P1 and P2 can be checked to determine if test pattern data is included with the bank. 2. The EVB always outputs bank ENDD at the end of the physical record. YBOS banks generated by Level 3 are added to the record following bank ENDD. The offset of the bank name (ENDD) relative to the first word in the Level 3 event buffer (exclusive record length) is provided in bank L3HD. 3. The Event ID in block 0 is the identifier generated by the Buffer Manager and sent to the EVB with a "pull event" message. The same event ID is output in bank L3HD. 4. The Buffer Multiplexor reads this bank from Level 3 and checks for valid ID and pattern words. Bank ENDD is normally not included in the event record output to tape. 5. Block 1 provides for a general test pattern definition. The initial implementation uses a fixed test pattern as defined below. 6. NPAT = End of data pointer - P2. 7. The version 1 test pattern has 4000 hex words. The lower halfword increments by 4 and the upper halfword increments by 1. Every other word is complemented. The pattern data in block 2 starts as follows: P2 00000000 hex P2+1 FFFEFFFB P2+2 00020008 P2+3 FFFCFFF3 P2+4 00040010 P2+5 FFFAFFEB P2+6 00060018 . . . CDF-152 Page 299 LEVEL 3 BANKS . . . CDF-152 Page 300 ALARMS AND LIMITS BANKS 11 ALARMS AND LIMITS BANKS This section describes the data structure for banks used with the Alarms and Limits system. These banks are not prepared by the Event Builder and are not included in event data records. CDF-152 Page 301 ALARMS AND LIMITS BANKS 11.1 FMUH Bank - Forward Muon High Voltage Bank This bank contains the Actual or Set High Voltages, or the Upper or Lower Tolerances thereof, for the Forward Muon Chamber. Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "FMUH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The FMUH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 16) 1 I*4 Pointer to West A tube Front 2 I*4 Pointer to West A tube Rear 3 I*4 Pointer to West B tube Front : : 8 I*4 Pointer to West D tube Rear 9 I*4 Pointer to East A tube Front : : IW(INDDAT+0) I*4 Pointer to East D tube Rear IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for FMU : : Notes: 1. No. of Blocks. Corresponds to 4 A-D tubes at the West Front and Rear, and at the East Front and Rear. 2. Block Pointers. These specify the displacement of the data for the relevant block relative to the Bank Data Index INDDAT. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the displacement of the first data word past the end of the data. Used to calculate the wordcount for the last Block. CDF-152 Page 302 ALARMS AND LIMITS BANKS 4. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 5. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 6. The Data for each Block has the format:- Channel Address (I*4) Channel HV (R*4) Channel Address (I*4) Channel HV (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bit 1-5 Channel Number (0-23) Bit 6-7 Tube Number (0-3) ! (A-D) Bit 8 Front/Rear (0-1) Bit 9 West/East (0-1) Bit 10-15 Unused Bit-Mask parameters to decode the channel address are defined in Alalin$Source:FMUHV.INC. Channel Data. Actual or Set Value of High Voltage, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 303 ALARMS AND LIMITS BANKS 11.2 FTCH Bank - Forward Tracking High Voltage Bank This bank contains the Actual or Set High Voltages, or the Upper or Lower Tolerances thereof, for the Forward Tracking Chamber Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "FTCH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The FTCH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 1) 1 I*4 Pointer to first and only Block IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for FTC : : Notes: 1. No. of Blocks. Block Pointer and End of Data Pointer. For compatibility with other banks, this structure has been kept even though the FTC bank is a fixed length bank. 2. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 3. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 4. The Data for a Block has the format:- Channel Address (I*4) Channel Data (R*4) CDF-152 Page 304 ALARMS AND LIMITS BANKS Channel Address (I*4) Channel Data (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bits 1 FTC HV Number (1) Bits 2-31 Unused Bit-Mask parameters to decode the channel address are defined in Alalin$Source:FTCHV.INC. Channel Data. Actual or Set Value of High Voltage, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 305 ALARMS AND LIMITS BANKS 11.3 CESH Bank - Central Strip High Voltage Bank This bank contains the Actual or Set High Voltages, or the Upper or Lower Tolerances thereof, for the Central Strip Chamber. Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "CESH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CESH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 1) 1 I*4 Pointer to first and only Block IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for CES : : Notes: 1. No. of Blocks. Block Pointer and End of Data Pointer. For compatibility with other banks, this structure has been kept even though the CES bank is a fixed length bank. 2. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 3. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 4. The Data for a Block has the format:- Channel Address (I*4) Channel Data (R*4) CDF-152 Page 306 ALARMS AND LIMITS BANKS Channel Address (I*4) Channel Data (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bits 1-3 STRIP Number (1-4), Crack (5) Bits 4-31 Unused Bit-Mask parameters to decode the channel address are defined in Alalin$Source:CESHV.INC. Channel Data. Actual or Set Value of High Voltage, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 307 ALARMS AND LIMITS BANKS 11.4 CMUH Bank - Central Muon High Voltage Bank This bank contains the Actual or Set High Voltages and chamber currents, or the Upper or Lower Tolerances thereof, for the Central Muon Chamber. Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "CMUH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CMUH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 8) 1 I*4 Pointer to West Module 0-5 : : 4 I*4 Pointer to West Module 18-23 : : 5 I*4 Pointer to East Module 0-5 IW(INDDAT+0) I*4 Pointer to East Module 18-23 IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for CMU : : Notes: 1. No. of Blocks. Corresponds to the West Modules and the East Modules taken in pairs (4 West, 4 East). 2. Block Pointers. These specify the displacement of the data for the relevant block relative to the Bank Data Index INDDAT. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the displacement of the first data word past the end of the data. Used to calculate the wordcount for the last Block. CDF-152 Page 308 ALARMS AND LIMITS BANKS 4. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 5. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 6. The Data for each Block has the format:- Channel Address (I*4) Channel HV (R*4) Channel Current (R*4) Channel Address (I*4) Channel HV (R*4) Channel Current (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bit 1-5 WEDGE Number (0-23) Bit 6 WEST/EAST (0-1) Bit 7-15 Unused Bit-Mask parameters are defined in Alalin$Source:CMUHV.INC. Channel Data. Actual or Set Value of High Voltage and current, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 309 ALARMS AND LIMITS BANKS 11.5 CDTH Bank - Central Drift Tube High Voltage Bank This bank contains the Actual or Set High Voltages and chamber currents, or the Upper or Lower Tolerances thereof, for the Central Drift Tubes Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "CDTH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The CDTH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 6) 1 I*4 Pointer to Sector A and B : : 4 I*4 Pointer to Sector G and H : : IW(INDDAT+0) I*4 Pointer to Sector K and L IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for CDT : : Notes: 1. No. of Blocks. Corresponds to 6 Pair Sectors ( AB, CD,...KL ). 2. Block Pointers. These specify the displacement of the data for the relevant block relative to the Bank Data Index INDDAT. The wordcount for each Block is determined by the difference between adjacent Pointers. 3. End of Data Pointer. Specifies the displacement of the first data word past the end of the data. Used to calculate the wordcount for the last Block. 4. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping CDF-152 Page 310 ALARMS AND LIMITS BANKS an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 5. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 6. The Data for each Block has the format:- Channel Address (I*4) Channel HV (R*4) Channel Current (R*4) Channel Address (I*4) Channel HV (R*4) Channel Current (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bit 1-3 Tube of Sector 2 (1-7) Bit 4-7 SECTOR2 (0-11) (A-L) Bit 8-10 Tube of Sector 1 (1-7) Bit 11-14 SECTOR1 (0-11) (A-L) Bit 15 Unused Bit-Mask parameters are defined in Alalin$Source:CDTHV.INC. Channel Data. Actual or Set Value of High Voltage and current, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 311 ALARMS AND LIMITS BANKS 11.6 VTPH Bank - VTPC High Voltage Bank This bank contains the Actual or Set High Voltages, or the Upper or Lower Tolerances thereof, for the Vertex Tracking Chamber Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "VTPH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The VTPH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 1) 1 I*4 Pointer to first and only Block IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Data for VTPC : : Notes: 1. No. of Blocks. Block Pointer and End of Data Pointer. For compatibility with other banks, this structure has been kept even though the VTPC bank is a fixed length bank. 2. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 3. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 4. The Data for a Block has the format:- Channel Address (I*4) Channel Data (R*4) CDF-152 Page 312 ALARMS AND LIMITS BANKS Channel Address (I*4) Channel Data (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bit 1-2 HV Number (0-2) Bit 3-6 Half Module Number (0-15) Bit 7 East/West (0-1) Bit 8-15 Unused Bit-Mask parameters to decode the channel address are defined in Alalin$Source:VTPHV.INC. Channel Data. Actual or Set Value of High Voltage, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. CDF-152 Page 313 ALARMS AND LIMITS BANKS 11.7 VTTH Bank - CTC And VTPC Temperature Tolerance Bank This bank contains the Actual or Set Temperature, or the Upper or Lower Tolerances thereof, for the CTC and VTPC Which set of values is actually present in a given bank is determined by the DataBase Attribute. This Bank has the following Bank Header Characteristics:- Bank Name : "VTTH" Bank Number : 1 Bank Type : BNKTI4 (Integer*4) The VTTH bank format is: Displacement from INDDAT Data Type Description ------------ --------- -------------------------------- 0 I*4 Number of Blocks ( = 1) 1 I*4 Pointer to first and only Block IW(INDDAT+0)+1 I*4 Pointer to End of Data + 1 IW(INDDAT+0)+2 I*4 Attribute Number IW(INDDAT+0)+3 I*4 Run Number IW(INDDAT+0)+4 I*4 Creation Date IW(INDDAT+0)+5 I*4 Creation Time IW(INDDAT+1) Temperature : : Notes: 1. No. of Blocks. Block Pointer and End of Data Pointer. For compatibility with other banks, this structure has been kept even though the VTT bank is a fixed length bank. 2. Attribute Number. This is the Integer returned by DBTRNA when translating the Attribute Name. This is normally the YBOS bank number of this bank. Keeping an extra 'copy' of this number inside the bank maintains the interpretability of the data if the bank must be renumbered for some reason. 3. Creation Date, Creation Time. The format of these words is the same as the corresponding information in the LRID bank. 4. The Data for a Block has the format:- Channel Address (I*4) Channel Data (R*4) CDF-152 Page 314 ALARMS AND LIMITS BANKS Channel Address (I*4) Channel Data (R*4) : : : Channel Address. This word is composed of the following fields:- Bit 0 Unused Bit 1-5 Temperature Number( 0-31) Bit 6-7 Detector ( 0:VTPC, 1:CTC, 2:Room__temperature) Bit 8 West/East( 0:West, 1:East) Bit 9 Top/Btm ( 0:Top, 1:Bottom ) Bit 10-11 Position in the CTC For CTC ( 1: Inner diameter, 2:Outer diameter,3:Face) For VTPC ( 1: HMD3, 2:HMD7, 3:HMD8) Bit 12-15 Unused Bit-Mask parameters to decode the channel address are defined in Alalin$Source:VTPTMP.INC. Channel Data. Actual or Set Value of Temperature, or Upper or Lower Tolerance thereof, according to the DataBase Attribute. APPENDIX A ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS A.1 DIFFERENCES BETWEEN V2.00 AND V1.00 1. The Bank Type word has been redefined and extended. This effects the format of all data banks described in this note. 2. New mechanisms within YBOS have been added to access the data within a Bank. Thus displacements within a Bank are given relative to the base returned via these mechanisms. 3. Pointers within Banks are redefined to specify offsets relative to the base address obtained from the data access mechanisms described above. 4. Scanner Oriented Banks are described in another document. 5. The Logical Record Types have been redefined to include a Calibration Event Type. This differs from a normal Event only in its type and the fact that it will not be written onto the raw data tapes. 6. The word numbering scheme within a bank has been clarified with separate offsets for Integer*4 and Integer*2 relative addressing. 7. The format of the LRID bank has been changed to accommodate a counter of the number of records of each type rather than just an inclusive counter. In addition these counters have been redefined to start at 1 rather than 0. The Process ID has been extended to include a Version and Release number. 8. The Format of the EVCL Bank has been changed to accommodate a 128-bit Trigger Mask. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-2 DIFFERENCES BETWEEN V2.00 AND V1.00 9. More Run Types have been defined. 10. More Process IDs have been defined. 11. Banks for the Intermediate Tracking Chambers are no longer defined since these Chambers no longer exist. 12. The Central Tracking Chamber and Vertex TPC are no longer readout by RABBIT Scanners, but using the SSP (SLAC Scanner Processor). The data format has therefore changed significantly. A.2 DIFFERENCES BETWEEN V2.3 AND V2.2 1. Definition for bank FESD deleted - no such data. 2. Banks CPTD, CDTD, FMCD and FTAD added. 3. Bank FHAD changed from 24 to 8 blocks. 4. Banks FMUD, and FMSD modified. 5. Definition of Bank EVCL modified to use word 13 for Run Conditions and word 14 for a one word error summary instead of two error words. The bank length is unchanged. 6. Section which defines detector component numbers is updated to agree with current component bank file in Run$Library. 7. Run Type and Record Type tables in Appendix B are updated to agree with current tables in Run$Library. There are minor corrections to sections B.5 and B.6 and additons to B.4. 8. Calibration bank definitions have been deleted for CEQD, CEID, CHQD and WHQD. Run Type now specifies the format of channel data words for such calibration and the bank format is the same as for event data, e.g. CEMD. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-3 DIFFERENCES BETWEEN V2.31 AND V2.3 A.3 DIFFERENCES BETWEEN V2.31 AND V2.3 1. CCRD - changed # of blocks from 8 to 16. 2. CPND and CPNX - updated channel address definition. 3. New central calorimetry banks: CTPD, CTPX, CSDD, CSDX, CCDD. 4. TL1D - updates to bank definition. 5. New trigger banks: TL2D, TFRD, TRCD, TCSD. 6. FMUD - minor changes in bank notes. A.4 DIFFERENCES BETWEEN V2.32 AND V2.31 1. FTAD - new definition of tbg ID word. 2. VTPD - new definition of this bank. It is now a monotype bank. 3. VTWX, CTCX, FTCX - new SSP calibration summary banks. 4. CPTD - major revision of this bank definition. 5. CDTD - interchanged tube and plane fields in channel ID, and changed order of tubes in sector blocks. A.5 DIFFERENCES BETWEEN V2.33 AND V2.32 1. TCSD - changed from I*2 to I*4. 2. FHWD - description of Start Channel/Cluster Width word for data taken in Jan-March 1987 run. 3. BFLD - new bank. 4. CFHD - new bank. 5. CTCD - note on cell pointer block. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-4 DIFFERENCES BETWEEN V2.34 AND V2.33 A.6 DIFFERENCES BETWEEN V2.34 AND V2.33 1. FTAX - new bank. 2. VTPX - new bank. 3. FTAD - each end of a wire pair is accessed via the cell in which it resides. 4. WHAD and WHTD - max rapidity segmentation is 5. A.7 DIFFERENCES BETWEEN V2.4 AND V2.34 - MARCH 5, 1987 1. CTCD - new bank format. Although this bank for Central Tracking TDC data has the same name as in earlier versions of this note, there is a major format change. Software used to access bank CTCD as defined in previous versions of CDF152 will not work with this new format. For this version, the SSP does not sort TDC data by channel number. This change from superlayer/cell/wire to superlayer/TDC/channel format was made at about Run 6215. 2. VTWD - new bank format similar to new CTCD. 3. FMTD - new Forward Muon Timing bank. 4. SFCD - new Forward Silicon CAMAC bank. 5. BBLD - changed number of blocks to 1 and inverted order of 32-bit words for beam and halo latch data. In earlier versions only 1 block had latch data, but it was the 2nd block. 6. SCLD - increased number of scalers from 4 to 8. 7. FTAX - fix minor document error (2 block pointers.) 8. EVCL - fix minor document error (see TS Start Scan Word.) A.8 DIFFERENCES BETWEEN V2.41 AND V2.4 - MARCH 20, 1987 ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-5 DIFFERENCES BETWEEN V2.41 AND V2.4 - MARCH 20, 1987 1. FMUD - correct bit definitions for TDC data words. 2. FMSD - correct bit definition for ADC data word. 3. Older versions of CDF152 have incorrect forward muon TDC and ADC bit definitions. A.9 DIFFERENCES BETWEEN V2.42 AND V2.41 - MARCH 26, 1987 1. CFPD - new Ctc Fast track-finder Pattern data bank. 2. CFWD - new Ctc Fast track-finder Wirelist data bank. 3. LATD - new Misc Latch, ADC and TDC data bank. Preliminary definition of this bank. 4. SCLD - add scalers 9 and 10 for central muon. 5. SFCD - add notes on Fwd Si registers and scalers. A.10 DIFFERENCES BETWEEN V2.43 AND V2.42 - APRIL 15, 1987 1. TCMD - new data bank for Trigger Central Muon Matchbox. A.11 DIFFERENCES BETWEEN V2.44 AND V2.43 - MAY 26, 1987 1. CPMD - new bank for debugging Central PENN Tracking. 2. LATD - update to bank format. The bank was generated in this format starting with Run 7373. A.12 DIFFERENCES BETWEEN V2.5 AND V2.44 - SEPT 22, 1987 ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-6 DIFFERENCES BETWEEN V2.5 AND V2.44 - SEPT 22, 1987 1. New Section 9 for unique Test Beam banks. 2. SABD - new bank for test beam Small Angle detector. 3. SATD - new bank for Small Angle drift chamber TDC data. 4. LSCD - new bank for test beam Latch and Scaler data. 5. Fixed minor errors in comments on banks PESD, CTCD and TCSD. A.13 DIFFERENCES BETWEEN V2.51 AND V2.5 - OCT 1, 1987 1. SVXD - new bank for Silicon Vertex test beam data. A.14 DIFFERENCES BETWEEN V2.52 AND V2.51 - OCT 7, 1987 1. TBCD - new bank for Test Beam Camac data. A.15 DIFFERENCES BETWEEN V2.53 AND V2.52 - OCT 28, 1987 1. SFCD - add blocks 2-3 with CAMAC ADC and TDC data for small angle scintillators. 2. TBCD - add blocks 1-2 with ADC and TDC data for small angle prototype scintillators. A.16 DIFFERENCES BETWEEN V2.6 AND V2.53 - NOV 20, 1987 1. VTRD - new VTPC bank for unreformatted TDC data. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-7 DIFFERENCES BETWEEN V2.6 AND V2.53 - NOV 20, 1987 2. CTRD - new CTC bank for unreformatted TDC data. 3. FTRD - new FTC bank for unreformatted TDC data. 4. SARD - new SAC bank for unreformatted TDC data. A.17 DIFFERENCES BETWEEN V2.61 AND V2.6 - DEC 27, 1987 1. CSID - new bank for Central 90 degree crack modules. A.18 DIFFERENCES BETWEEN V2.70 AND V2.61 - APR 26, 1988 1. TCSD - add description for blocks 60-62. 2. CEGD - new bank for x16 Central EM channels. 3. FHXD - new bank for Forward Hadron calorimeter anode planes. A.19 DIFFERENCES BETWEEN V2.80 AND V2.70 - JUNE 20, 1988 1. TAGC - new Trigger mask tag bank for users/consumers. 2. TAGD - new Trigger mask tag bank for internal DAQ pipeline. 3. ERRD - new Error Report bank for readout errors from scanners and the hardware EVB. 4. SCLD - number of scalers changed to 9. 5. EVCL - added definition of trigger mask. 6. New Section 10 with banks with EVB/L3/BMX banks. 7. ENDD - new Level 3 bank in section 10. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-8 DIFFERENCES BETWEEN V2.90 AND V2.80 - JULY 8, 1988 A.20 DIFFERENCES BETWEEN V2.90 AND V2.80 - JULY 8, 1988 1. ALMD - new MX Alarms and Limits bank. 2. IMXD - new MX image/diagnostic bank. 3. TMXD - new MX execution time bank. 4. PRMD - new RABBIT card ID bank. 5. TODD - new date and time bank. 6. BFLD - bank type changed from R*4 to Mixed and new DVM channel definitions. 7. TCMD - modified description of Cluster Bus Interface data in block 2. 8. LATD - added one word (MR intensity) to end of block 0. 9. SCLD - changed number of scalers from 9 to 14. 10. TFRD - added 3 words and replaced Notes. A.21 DIFFERENCES BETWEEN V3.00 AND V2.90 - AUGUST 30, 1988 1. L3HD - new Level 3 Header bank. 2. FMCD - major modifications. 3. BFLD - add solenoid NMR word. 4. EVCL - add definition of FASTBUS error field in trigger mask. 5. LATD - add new 24-bit CAMAC latch and trigger inhibit words. 6. MTPD - new MX test bank. 7. TL2D - add three blocks (10-12) for new Mercury modules. 8. SCLD - add Level 2 scaler (block 15) and definition of scaler channels taken from Note TGN 67 dated 28-Jul-1988. ___________ _______ ________ DIFFERENCES BETWEEN VERSIONS Page A-9 DIFFERENCES BETWEEN V3.00 AND V2.90 - AUGUST 30, 1988 9. New Alarms and Limits section. A.22 DIFFERENCES BETWEEN V3.10 AND V3.00 - MARCH, 1990 1. CPRD - New Central Preradiator bank. 2. Updated prose. A.23 DIFFERENCES BETWEEN V3.11 AND V3.10 - JUNE 1990 1. TBSD - New Test Beam Stand Data bank 2. Updated prose. APPENDIX B _______ ___________ VARIOUS DEFINITIONS B.1 EXPERIMENT TYPES The following Experiment Types have been defined:- Type 0 CDF Physics (88-89 run) 1 Cosmic Ray Test Stand 2 Test Beam 1 (NW) 3 Test Beam 2 (Meson) 4 Offline Simulation 5 Test Beam (1991) 6 P.I.G. 7 CDF Physics (Run1A, 1992) Further Experiment Types will be specified as required. During Run1A, these values were defined for the Data Logger and the Level3 system in Analysis_Control$Library:Ancomp_Exp_ID.Inc and for Run_Control in Run$Work:Get_Experiment_Type.Cdf. B.2 RUN TYPES The following Run Types have been defined:- Type 0 Undefined 1 Physics 2 Cosmic Ray 3 Central EM LED 4 Pedestals 5 Central EM Source 6 Central Hadron Source 7 Wall Hadron Source 8 Central EM Flasher 9 Central Hadron Laser 10 PM Charge Injection 11 Central EM Strip Charge Injection 12 Central Muon Source 13 Gas Calorimeter Charge Injection 14 Hadron TDC _______ ___________ VARIOUS DEFINITIONS RUN TYPES 15 Central Muon TDC 16 PM Current Injection 17 Central EM Line Source 18 Central Hadron Line Source 19 Wall Hadron Line Source 20 Laser Source 21 Laser Pedestal 22 LeCroy 1879 CAT 23 LeCroy 1879 ASD 24 LeCroy 1879 Preamplifier 25 Gas Calorimeter Wire Pulse 26 Gas Calorimeter Time Constant 27 Forward Muon Wire Pulse 28 Forward Muon Scintillator Pulse 29 Trigger Calibration 31 EWE Calibration 32 Simulated Physics Trigger Further Run Types will be specified as required. During Run1A, these values were defined in Run$Library:Run_Types.Inc. B.3 RECORD TYPES The following Record Types have been defined:- Type 0 Event Record 1 Calibration Event 2 Begin Run Record 3 End Run Record 4 Calibration Record 5 Geometry Record 6 Comment Record 7 Beam Status Record 8 Magnet Status Record 9 Histogram Record 10 Error Log Record 512 Calibration Begin Run Record 513 Calibration End Run Record Further Record Types will be specified as required. During Run1A, the record types used by Run_Control were defined in Run$Library:Record_Types.Inc. B.4 CDF COMPUTER IDS The following Computer IDs have been defined:- 201 B0UV02 203 CDFTB _______ ___________ VARIOUS DEFINITIONS CDF COMPUTER IDS 205 PIGCON 301 FASTBUS Hardware Development 730 (Node CDFHRD) 302 Cosmic Ray Test Stand 730 (Node CDFCRT) 303 PIG Electronics Development 730 (Node CDFPIG) 304 FASTBUS Software Development 730 (Node CDFDSG) 305 NW Testbeam 730 (Node CDFNW) 306 Trigger Development 730 (Node CDFTRG) 321 B0UV01 322 CDFTBA 351 B0CC01 352 B0CC02 421 B0CC03 422 B0CC04 423 B0CC05 424 B0BM01 501 B0 Test 750 (Node B0SCCA) 502 B0 Test 750 (Node B0SCCB) 503 B0 Test 750 (Node B0SCCC) 641 B0SCCF 801 KEK 780 (Node CDF) 802 Offline 780 (Node CDFSFT) 803 Online 780 (Node B0HOST) 821 B0SCCZ 822 B0SCCD 823 B0SCCE Further Computer IDs will be specified as required. During Run1A, these values were defined for the Data Logger in Analysis_Control$Library:Ancomp_Exp_ID.Inc. B.5 PARTITION NUMBERS The following assignments have been made for Partition Numbers:- 0 Used to indicate all active partitions 1-15 Active partitions B.6 PROCESS IDS The following Process Identifiers have been defined:- _______ ___________ VARIOUS DEFINITIONS PROCESS IDS 0 RUN CONTROL 1 MIDAS 2 CDFGEN/CDFSIM/CDFANA 3 VTPC Further Process Identifiers will be specified as required.