US 7,333,468 B1
Digital phase locked loops for packet stream rate matching and restamping
Sebastian Turullols, Los Altos, Calif. (US); Aly E. Orady, Sunnyvale, Calif. (US); James J. Yu, San Jose, Calif. (US); and Andrew C. Yang, Sunnyvale, Calif. (US)
Assigned to Sun Microsystems, Inc., Santa Clara, Calif. (US)
Filed on May 16, 2005, as Appl. No. 11/129,798.
Int. Cl. H04J 3/24 (2006.01); H04J 3/06 (2006.01); H04L 12/56 (2006.01); H04L 7/00 (2006.01); H04L 7/04 (2006.01); H04L 9/00 (2006.01); H04B 1/18 (2006.01); H04B 1/10 (2006.01)
U.S. Cl. 370—349  [370/350; 370/395.62; 370/509; 370/514; 455/180.3; 455/181.1; 455/183.2; 375/357; 375/366; 375/362; 375/350; 375/355; 713/178] 21 Claims
OG exemplary drawing
 
1. A system comprising:
a timestamp estimator configured to generate a current timestamp estimate based on an estimate of a source clock frequency associated with a packet stream;
a summation unit configured to receive (a) a current received timestamp of the packet stream and (b) the current timestamp estimate, and to compute a current error equal to a difference of the current received timestamp and the current timestamp estimate;
a filter FA configured to filter the current error to obtain a filter output z;
wherein the timestamp estimator is further configured to compute a first update of the estimate of the source clock frequency based on the filter output value z;
wherein the estimate of the source clock frequency is used to restamp at least a subset of the packets of the packet stream.