Wednesday, June 25, Notes

Present: Ed Barsotti, Aesook Byon-Wagner, Myron Campbell, Bob DeMaat,
	 Bob Downing, Colleen Murphy, Jim Patrick, Keith Schuh

Myron Campbell and Colleen Murphy met with the PCBCP to review the TDC
(Time-to-Digital Converter) being developed at the Universtity of Michigan.

The panel was provided with the following documentation:
	Deadtime-less 96 Channel Multihit TCD
	Schematic diagrams
	Layout drawings
	TDC Registers
	TDC96 Diagnostic Checklist
	TDC96 Reset Procedures
	Test Stand Procedures for the TDC96 Board
	TDC96 Interrupt PAL
	TDC96 Front Panel
	Bill-of-materials file
			
Myron and Colleen brought a prototype board that has support circuitry for
96 channels but space for only 16 JMC96 prototype chips due to the prototype
chips being in packages that are larger that those the production parts will
be packaged in.

Myron needs to know ASAP if the cable pitch will be changed due to the COT
people wanting to change to a different style of cable.

Voltages. Several options:
  1) ECL or LVDS signals can be received on the front panel.  The appropriate
levels are determined by which chips populate certain locations on the circuit
board and which terminating resisitors are installed.  Additionally, -5.2 volts
is required for ECL to operate.  Testing shows that driving inputs which are
configured for one technololgy with signals generated by the other technology
results in a lack of functionality but no permanent damage occurs.

  2) The COT requires -3.5 volts out the front panel of the TDC.  This DC
voltage is supplied through the secondary of a transformer.  The transformer
allow a control pulse to be driven on to the DC signal.  The voltage can
either be provided by a power supply driving one of the backplane power 
buses or by an on-board DC/DC converting -12 volts from the backplane.
     In either case, a circuit breaker is used to limit the current going
out the front panel to the COT cable interface cards.  The choice of DC/DC
converters versus having another power supply for the subrack is a tradeoff
of cost and space.  300 DC/DC converters @ $50 versus one more power supply
per subrack.

  3) The Flash memory requires +12 volts to program the parts in situ.
Some of the TDC boards will not require this capability.

Bob DeMaat requested a description of these various power options be
written and included in the documentation.  

Ed asked about the lack of an ESD strip and resistors and Colleen explained
that the PCB fab house had assumed that the strip was a mistake and eliminated
it from the artwork.  This will be corrected in the next version of the board.

Keith would like to see names rather than initials on the schematics and
other drawings.  Myron suggested that the inclusion of a "page 0" with
the drawing set could be used to indicate who was responsible for the
various parts of the design.

Myron:
There will be two surface mount headers for diagnostic purposes and three
surface mount connectors for mezzanine cards.  The form factor, connector
placement and dimensions are discussed in a document that addresses
mezzanine cards.

During Run II there will be two levels of repair for boards suspected of
being faulty.  The first level will be handled at PREP where basic tests will
be done to confirm there is a problem and simple repairs can be made.  For
symptoms that require an expert, boards can be sent to the University of
Michigan for trouble shooting and repair.

Bob DeMaat requested timing diagrams for I/O operations.

Colleen described several aspects of the TDC:
It is an A32/D32 VME module that supports block reads in 32-bit format
only.

The TDC is a 10-layer board: 3 power and 7 trace layers.

The on-board buses are limited to fanouts of eight.  Of these, highest-speed
CMOS buses are terminated.

Myron:
The main clock runs at 41.607 MHz.

For Muons, the front panel connector on the cable can be without ground.
For the COT, the cable connector will have ground.

Bob DeMaat will provide Myron with keying information.

FUSING:
At the time of the review, Myron, Colleen and the panel had not yet agreed
on an approach to provide over-current protection to the TDC.

Myron would like us to understand that he does not see the need for
over-current and over-voltage protection for the VME-style boards.  His
experience indicates that the power supply crowbar circuit will remove the
current quickly enough to be safe in the event of a short circuit on the
board.  Reliability will suffer due to failures in these additional parts.
Necking the power distribution down to a narrow path through a fuse is less
noise-tolerant then distributing the power from the backplane to the module's
power plane through a number of pins spread across the connectors.

However, Myron does feel that the TDC should provide overcurrent protection
for the off-board electronics that are powered by the TDC card.  To this end,
a circuit breaker is installed in the TDC which can be oriented in one fashion
if power comes from the backplane and oriented in another fashion if the power
is to be provided by DC/DC converters.

Bob Downing voiced his concern over the detrimental effect on noise margin,
due to voltage drop, when fuses are used for circuitry powered by lower and
lower voltages which are the trend in IC design.  An example is circuitry
designed to operate at 3 volts.

If required to have over-current protection then Myron's preference is for
using two polyswitches in parallel.  [This was at the time of the review.
Subsequently, Myron is investigating the use of two surface mount fuses in
parallel.]

Ed Barsotti feels that boards benefit from over-current and over-voltage
protection and has seen boards which were charred by the heat of excessive
currents.  The damage could have eliminated or reduced by over-current
protection.

With proper over-voltage protection, chips can survive an over-voltage
incident that would otherwise cause many chips to fail.

Tests will be conducted by the Computing Division to determine the suitability
of using fuses and polyswitches in parallel.  In addition, the Computing
Division will look at using Tranzorbs to protect circuitry that is drawing
greater than 5 amps.


If you find inaccuracies (or omissions) you would like to have corrected,
please send comments to Bob DeMaat.   demaat@fnal.gov    fnald::demaat